AdNoC case-study for Mpeg4 benchmark: improving performance and saving energy with an adaptive NoC
Proceedings of the 24th symposium on Integrated circuits and systems design
A survey on application mapping strategies for Network-on-Chip design
Journal of Systems Architecture: the EUROMICRO Journal
An analytical model for on-chip interconnects in multimedia embedded systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on ESTIMedia'10
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Design of Network on chip architectures for multimedia applications is being widely studied. This involves design decisions at various levels of hierarchy. Topology design is one of the significant factors that affect the net delay and the energy consumption of the system. Most of the applications are characterized by bandwidth requirements and latency constraints. The topology must be built satisfying these constraints. The paper aims in generating low energy tree based topologies using homogeneous routers for bandwidth and latency constrained applications.