SoCIN: A Parametric and Scalable Network-on-Chip
SBCCI '03 Proceedings of the 16th symposium on Integrated circuits and systems design
Distributed sleep transistor network for power reduction
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip
IEEE Transactions on Parallel and Distributed Systems
ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Fully Adaptive Fault-Tolerant Routing Algorithm for Network-on-Chip Architectures
DSD '07 Proceedings of the 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools
NoCOUT: NoC topology generation with mixed packet-switched and point-to-point networks
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
ReNoC: A Network-on-Chip Architecture with Reconfigurable Topology
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
NoC Power Optimization Using a Reconfigurable Router
ISVLSI '09 Proceedings of the 2009 IEEE Computer Society Annual Symposium on VLSI
ICETET '09 Proceedings of the 2009 Second International Conference on Emerging Trends in Engineering & Technology
Analyzing the performance of mesh and fat-tree topologies for network on chip design
EUC'05 Proceedings of the 2005 international conference on Embedded and Ubiquitous Computing
System-Level Buffer Allocation for Application-Specific Networks-on-Chip Router Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The Network-on-Chip (NoC) topology for Multi Processor System-on-Chip (MPSoC) is a key factor for power consumption and communication time. In this work, we propose a NoC architecture that can adapt itself during run-time according to traffic patterns, based on an external control that changes the topology chosen. As a function of the application, the router connections can change from mesh to irregular topology (and vice-versa) to improve communication time and to save energy. This approach can improve the performance of an application under different traffic conditions. For the Mpeg4 case-study application is possible to decrease the communication time in 16%, saving around 62% in energy by choosing the right topology at each communication phase of the application. The extra area required for the adaptability is compensated by zero redesign costs, making it possible to reuse the NoC for any behavior without significant penalties.