Dynamic Task Mapping for MPSoCs

Authors:
Ewerson Luiz de Souza Carvalho;Ney Laert Vilar Calazans;Fernando Gehm Moraes
Affiliations:
Pontifícia Universidade Católica do Rio Grande do Sul;Pontifícia Universidade Católica do Rio Grande do Sul;Pontifícia Universidade Católica do Rio Grande do Sul
Venue:
IEEE Design & Test
Year:
2010

Citing 0
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Abstract

Multiprocessor-system-on-a-chip (MPSoC) applications can consist of a varying number of simultaneous tasks and can change even after system design, enforcing a scenario that requires the use of dynamic task mapping. This article investigates dynamic task-mapping heuristics targeting reduction of network congestion in network-on-chip (NoC)-based MPSoCs. The proposed heuristics achieve up to 31% smaller channel load and up to 22% smaller packet latency than other heuristics.