Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach

  • Authors:
  • Luciano Ost;Marcelo Mandelli;Gabriel Marchesan Almeida;Leandro Moller;Leandro Soares Indrusiak;Gilles Sassatelli;Pascal Benoit;Manfred Glesner;Michel Robert;Fernando Moraes

  • Affiliations:
  • LIRMM, CNRS, University of Montpellier II, France;PUCRS, Brazil;ITIV, KIT, Karlsruhe, Germany;Darmstadt University of Technology, Darmstadt, Germany;University of York, York, U.K;LIRMM, CNRS, University of Montpellier II, France;LIRMM, CNRS, University of Montpellier II, France;Darmstadt University of Technology, Darmstadt, Germany;LIRMM, CNRS, University of Montpellier II, France;PUCRS, Brazil

  • Venue:
  • ACM Transactions on Embedded Computing Systems (TECS)
  • Year:
  • 2013

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Abstract

The mapping of tasks to processing elements of an MPSoC has critical impact on system performance and energy consumption. To cope with complex dynamic behavior of applications, it is common to perform task mapping during runtime so that the utilization of processors and interconnect can be taken into account when deciding the allocation of each task. This paper has two major contributions, one of them targeting the general problem of evaluating dynamic mapping heuristics in NoC-based MPSoCs, and another focusing on the specific problem of finding a task mapping that optimizes energy consumption in those architectures.