Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip

Authors:
Zhonghai Lu;Axel Jantsch
Affiliations:
Royal Institute of Technology, Sweden;Royal Institute of Technology, Sweden
Venue:
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Year:
2007

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Abstract

Configuring Time-Division-Multiplexing (TDM) Virtual Circuits (VCs) for network-on-chip must guarantee conflict freedom for overlapping VCs besides allocating sufficient time slots to them. These requirements are fulfilled in the slot allocation phase. In the paper, we define the concept of a logical network (LN). Based on this concept, we develop and prove theorems that constitute sufficient and necessary conditions to establish conflict-free VCs. Using these theorems, slot allocation for VCs becomes a procedure of computing LNs and then assigning VCs to different LNs. TDM VC configuration can thus be predictable and correct-by-construction. We have integrated this slot allocation method into our multi-node VC configuration program and applied the program to an industrial application.