Constraints-driven scheduling and resource assignment
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Æthereal Network on Chip: Concepts, Architectures, and Implementations
IEEE Design & Test
Energy-aware mapping for tile-based NoC architectures under performance constraints
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Introduction to the cell multiprocessor
IBM Journal of Research and Development - POWER5 and packaging
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
aelite: a flit-synchronous network on chip with composable and predictable services
Proceedings of the Conference on Design, Automation and Test in Europe
Scheduling dynamic dataflow graphs with bounded memory using the token flow model
ICASSP'93 Proceedings of the 1993 IEEE international conference on Acoustics, speech, and signal processing: plenary, special, audio, underwater acoustics, VLSI, neural networks - Volume I
Programming challenges & solutions for multi-processor SoCs: an industrial perspective
Proceedings of the 48th Design Automation Conference
Profiling of Dataflow Programs Using Post Mortem Causation Traces
SIPS '12 Proceedings of the 2012 IEEE Workshop on Signal Processing Systems
A TDM NoC supporting QoS, multicast, and fast connection set-up
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
| Hi-index | 0.00 |
This paper addresses design space exploration for streaming applications (such as MPEG) running on multi-processor platforms with guaranteed service interconnects. In particular, we solve mapping, path selection and router configuration problems. Given the complexity of these problems, state of the art approaches in this area largely rely on greedy heuristics, which do not guarantee optimality. Our approach is based on a constraint programming formulation that combines a number of steps, sequential in classical approaches. Thus, our method has the potential of finding optimal solutions with respect to resource usage under processing and bandwidth constraints. The experimental evaluation shows that our approach is capable of exploring a range of solutions while giving the designer the opportunity to emphasize the importance of various design metrics.