Virtualizing network-on-chip resources in chip-multiprocessors

Authors:
Francisco Triviño;José L. Sánchez;Francisco J. Alfaro;José Flich
Affiliations:
Department of Computing Systems, University of Castilla-La Mancha, Albacete, Spain;Department of Computing Systems, University of Castilla-La Mancha, Albacete, Spain;Department of Computing Systems, University of Castilla-La Mancha, Albacete, Spain;Parallel Architectures Group, Technical University of Valencia, Valencia, Spain
Venue:
Microprocessors & Microsystems
Year:
2011

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Abstract

The number of cores on a single silicon chip is rapidly growing and chips containing tens or even hundreds of identical cores are expected in the future. To take advantage of multicore chips, multiple applications will run simultaneously. As a consequence, the traffic interferences between applications increases and the performance of individual applications can be seriously affected. In this paper, we improve the individual application performance when several applications are simultaneously running. This proposal is based on the virtualization concept and allows us to reduce execution time and network latency in a significant percentage.