Challenges in gate level modeling for delay and SI at 65nm and below
Proceedings of the 45th annual Design Automation Conference
Addressing library creation challenges from recent Liberty extensions
Proceedings of the 45th annual Design Automation Conference
On efficient Monte Carlo-based statistical static timing analysis of digital circuits
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Risk aversion min-period retiming under process variations
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Statistical static timing analysis: A survey
Integration, the VLSI Journal
Timing analysis with compact variation-aware standard cell models
Integration, the VLSI Journal
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Tuning-friendly body bias clustering for compensating random variability in subthreshold circuits
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Statistical static timing analysis considering leakage variability in power gated designs
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
A Gaussian mixture model for statistical timing analysis
Proceedings of the 46th Annual Design Automation Conference
Proceedings of the 46th Annual Design Automation Conference
An outlook on design technologies for future integrated systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Accurate estimation of vector dependent leakage power in the presence of process variations
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Proceedings of the 47th Design Automation Conference
Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations
Proceedings of the 47th Design Automation Conference
Representative path selection for post-silicon timing prediction under variability
Proceedings of the 47th Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Practical Monte-Carlo based timing yield estimation of digital circuits
Proceedings of the Conference on Design, Automation and Test in Europe
Statistical static timing analysis using Markov chain Monte Carlo
Proceedings of the Conference on Design, Automation and Test in Europe
Graph partition based path selection for testing of small delay defects
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
A unified multi-corner multi-mode static timing analysis engine
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Advanced variance reduction and sampling techniques for efficient statistical timing analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Variation-aware placement with multi-cycle statistical timing analysis for FPGAs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Path criticality computation in parameterized statistical timing analysis
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Device-parameter estimation with on-chip variation sensors considering random variability
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Monte Carlo methods: a computational pattern for our pattern language
Proceedings of the 2010 Workshop on Parallel Programming Patterns
PATMOS'09 Proceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Proceedings of the International Conference on Computer-Aided Design
Aging analysis at gate and macro cell level
Proceedings of the International Conference on Computer-Aided Design
Proceedings of the 49th Annual Design Automation Conference
Vertical and horizontal integration towards collective adaptive system: a visionary approach
Proceedings of the 2012 ACM Conference on Ubiquitous Computing
On the computation of criticality in statistical timing analysis
Proceedings of the International Conference on Computer-Aided Design
Revisiting automated physical synthesis of high-performance clock networks
ACM Transactions on Design Automation of Electronic Systems (TODAES)
TAU 2013 variation aware timing analysis contest
Proceedings of the 2013 ACM international symposium on International symposium on physical design
Reliability challenges for electric vehicles: from devices to architecture and systems software
Proceedings of the 50th Annual Design Automation Conference
Proceedings of the 50th Annual Design Automation Conference
The effect of random dopant fluctuations on logic timing at low voltage
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A high-precision on-chip path delay measurement architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A sensor-assisted self-authentication framework for hardware trojan detection
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Custom on-chip sensors for post-silicon failing path isolation in the presence of process variations
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Static-timing analysis (STA) has been one of the most pervasive and successful analysis engines in the design of digital circuits for the last 20 years. However, in recent years, the increased loss of predictability in semiconductor devices has raised concern over the ability of STA to effectively model statistical variations. This has resulted in extensive research in the so-called statistical STA (SSTA), which marks a significant departure from the traditional STA framework. In this paper, we review the recent developments in SSTA. We first discuss its underlying models and assumptions, then survey the major approaches, and close by discussing its remaining key challenges.