Arithmetic Design on Quantum-Dot Cellular Automata Nanotechnology
SAMOS '08 Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
Design and simulation of a QCA 2 to 1 multiplexer
ICCOMP'08 Proceedings of the 12th WSEAS international conference on Computers
An outlook on design technologies for future integrated systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Novel RAM cell designs based on inherent capabilities of quantum-dot cellular automata
Microelectronics Journal
Layout design of manufacturable quantum-dot cellular automata
Microelectronics Journal
New robust QCA D flip flop and memory structures
Microelectronics Journal
| Hi-index | 0.03 |
At nanoscale, quantum-dot cellular automata (QCA) defines a new device architecture that permits the innovative design of digital systems. Features of these systems are the allowed crossing of signal lines with different orientation in polarization on a Cartesian plane, the potential of high throughput due to efficient pipelining, fast signal switching, and propagation. However, QCA designs of even modest complexity suffer from the negative impact due to the placement of long lines of cells among clocking zones, thus resulting in increased delay, slow timing, and sensitivity to thermal fluctuations. In this paper, different schemes for clocking and timing of the QCA systems are proposed; these schemes utilize 2D techniques that permit a reduction in the longest line length in each clocking zone. The proposed clocking schemes utilize logic-propagation techniques that have been developed for systolic arrays. Placement of QCA cells is modified to ensure correct signal generation and timing. The significant reduction in the longest line length permits a fast timing and efficient pipelining to occur while guaranteeing a kink-free behavior in switching.