Novel RAM cell designs based on inherent capabilities of quantum-dot cellular automata

Authors:
Mostafa Abdollahian Dehkordi;Abbas Shahini Shamsabadi;Behrouz Shahgholi Ghahfarokhi;Abbas Vafaei
Affiliations:
Islamic AZAD University, Shahrekord Branch, Shahrekord, Iran;Islamic AZAD University, Farsan Branch, Farsan, Iran;Department of Information Technology, University of Isfahan, Isfahan, Iran;Department of Computer Engineering, University of Isfahan, Isfahan, Iran
Venue:
Microelectronics Journal
Year:
2011

Citing 7
Cited 2

Design of sequential circuits by quantum-dot cellular automata

Microelectronics Journal
A Serial Memory by Quantum-Dot Cellular Automata (QCA)

IEEE Transactions on Computers
Fault Tolerant Schemes for QCA Systems

DFT '08 Proceedings of the 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems
Applying inherent capabilities of quantum-dot cellular automata to design: D flip-flop case study

Journal of Systems Architecture: the EUROMICRO Journal
Improving line-based QCA memory cell design through dual phase clocking

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A line-based parallel memory for QCA implementation

IEEE Transactions on Nanotechnology
Two-Dimensional Schemes for Clocking/Timing of QCA Circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

New robust QCA D flip flop and memory structures

Microelectronics Journal
Transceiver with inductive coupling for wireless chip-to-chip communication using a 50-nm digital CMOS process

Microelectronics Journal

Quantified Score

Hi-index	0.00

Visualization

Abstract

Quantum Cellular Automata (QCA) is a novel and attractive method which enables designing and implementing high-performance and low-power consumption digital circuits at nano-scale. Since memory is one of the most applicable basic units in digital circuits, having a fast and optimized QCA-based memory cell is remarkable. Although there are some QCA structures for a memory cell in the literature, however, QCA characteristics may be used in designing a more optimized memory cell than blindly modeling CMOS logics in QCA. In this paper, two improved structures have been proposed for a loop-based Random Access Memory (RAM) cell. In the proposed methods, the inherent capabilities of QCA, such as the programmability of majority gate and the clocking mechanism have been considered. The first proposed method enjoys smaller number of cells and the wasted area has been reduced compared to traditional loop-based RAM cell. For the second proposed method, the memory access time has been duplicated in presence of smaller number of cells. Irregular placement of QCA cells in a QCA layout makes its realization troublesome. So, we have proposed alternative versions of the proposed methods that exploit regularity of clock zones in design and have compared them to each other. QCA designer has been employed for simulation of the proposed designs and proving their validity.