Power optimization of variable voltage core-based systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
The simulation and evaluation of dynamic voltage scaling algorithms
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
A survey of design techniques for system-level dynamic power management
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low-power electronics and design
Optimization of VDD and VTH for low-power and high speed applications
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors
Proceedings of the 38th annual Design Automation Conference
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Voltage-Clock-Scaling Adaptive Scheduling Techniques for Low Power in Hard Real-Time Systems
RTAS '00 Proceedings of the Sixth IEEE Real Time Technology and Applications Symposium (RTAS 2000)
Voltage-Clock Scaling for Low Energy Consumption in Real-Time Embedded Systems
RTCSA '99 Proceedings of the Sixth International Conference on Real-Time Computing Systems and Applications
A Dynamic Voltage Scaling Algorithm for Sporadic Tasks
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
IEEE Transactions on Computers
A dynamic-mode DVS algorithm under dynamic workloads
ACM SIGBED Review - Special issue: IEEE RTAS 2005 work-in-progress
Bounded energy allocation and scheduling for real-time Embedded Systems
Journal of Embedded Computing - Real-Time and Embedded Computing Systems
A Dynamic Voltage Scaling Algorithm for Dynamic Workloads
Journal of Signal Processing Systems
Energy-aware dual-mode voltage scaling for weakly hard real-time systems
Proceedings of the 2010 ACM Symposium on Applied Computing
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Scaling down power supply voltage yields a quadratic reduction in dynamic power dissipation and also requires a reduction in clock frequency. In order to meet task deadlines in hard real-time systems, the delay penalty in voltage scaling needs to be carefully considered to achieve low power consumption. In this paper, we focus on dynamic reclaiming of early released resources in Earliest Deadline First (EDF) scheduling using voltage scaling. In addition to a static voltage assignment, we propose a new dynamic-mode assignment, which has a flexible voltage mode setting at run-time enabling much larger energy savings. Using simulation results and exploiting the interplay between power supply voltage, frequency, and circuit delay in CMOS technology, we find the optimal two-level voltage settings that minimize energy consumption.