High performance DSPs - what's hot and what's not?
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
The simulation and evaluation of dynamic voltage scaling algorithms
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Low Power Digital CMOS Design
Iterative decoding of binary block and convolutional codes
IEEE Transactions on Information Theory
Design of low-power high-speed maximum a priori decoder architectures
Proceedings of the conference on Design, automation and test in Europe
Low-power design of turbo decoder with exploration of energy-throughput trade-off
Compilers and operating systems for low power
Channel Decoder Architecture for 3G Mobile Wireless Terminals
Proceedings of the conference on Design, automation and test in Europe - Volume 3
Architecture-driven voltage scaling for high-throughput turbo-decoders
Journal of Embedded Computing - Low-power Embedded Systems
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Low Power is an extremely important issue for future mobile radio systems. Channel decoders are essential building blocks of base-band signal processing units in mobile terminal architectures. Thus low power implementations of advanced channel decoding techniques are mandatory. In this paper we present a low power implementation of the most sophisticated channel decoding algorithm (Turbo-decoding) on programmable architectures. Low power optimization is performed on two abstraction levels: on system level by the use of an intelligent cancellation technique, on implementation level by the use of dynamic voltage scaling. With these techniques we can reduce the worst case is also applicable for hardware implementations. To the best of our knowledge, this is the first in-depth study of low power implementations of Turbo-decoders based on voltage scheduling for third generation wireless systems.