Low-swing clock domino logic incorporating dual supply and dual threshold voltages
Proceedings of the 39th annual Design Automation Conference
Proceedings of the 13th ACM Great Lakes symposium on VLSI
A methodology for low power scheduling with resources operating at multiple voltages
Integration, the VLSI Journal
An approach for reducing dynamic power consumption in synchronous sequential digital designs
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Digital Circuit Optimization via Geometric Programming
Operations Research
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Optimizing energy to minimize errors in dataflow graphs using approximate adders
CASES '10 Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
An approach to energy-error tradeoffs in approximate ripple carry adders
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
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Recent research has shown that voltage scaling is a very effective technique for low-power design. This paper describes a voltage scaling technique to minimize the power consumption of a combinational circuit. First, the converter-free multiple-voltage (CFMV) structures are proposed, including the p-type, the n-type, and the two-way CFMV structures. The CFMV structures make use of multiple supply voltages and do not require level converters. In contrast, previous works employing multiple supply voltages need level converters to prevent static currents, which may result in large power consumption. In addition, the CFMV structures group the gates with the same supply voltage in a cluster to reduce the complexity of placement and routing for the subsequent physical layout stage. Next, we formulated the problem and proposed an efficient heuristic algorithm to solve it. The heuristic algorithm has been implemented in C and experiments were performed on the ISCAS85 circuits to demonstrate the effectiveness of our approach