Reconfigurable SRAM architecture with spatial voltage scaling for low power mobile multimedia applications

Authors:
Minki Cho;Jason Schlessman;Wayne Wolf;Saibal Mukhopadhyay
Affiliations:
School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA;Princeton University, Princeton, NJ;School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA;School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2011

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Abstract

This paper presents a dynamically reconfigurable SRAM array for low-power mobile multimedia application. The proposed structure use a lower voltage for cells storing low-order bits and a nominal voltage for cells storing higher order bits. The architecture allows reconfigure the number of bits in the low-voltage mode to change the error characteristics of the array in run-time. Simulations in predictive 70 nm nodes show that the proposed array can obtain 45% savings in memory power with a marginal (∼10%) reduction in image quality.