Cache design trade-offs for power and performance optimization: a case study
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Instruction level power analysis and optimization of software
Journal of VLSI Signal Processing Systems - Special issue on technologies for wireless computing
Combining loop transformations considering caches and scheduling
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Analytical energy dissipation models for low-power caches
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Low power design in deep submicron electronics
The filter cache: an energy efficient memory structure
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Operating-system directed power reduction
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design
Low Power Digital CMOS Design
Energy-Efficiency of VLSI Caches: A Comparative Study
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Architectural-level power estimation and experimentation
Architectural-level power estimation and experimentation
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There is a growing consensus that energy consumption is becoming an important issue for a wide variety of systems. Two factors fuel these trends: (1) increasing use of embedded and portable computing devices in everyday life, and(2) very high power dissipation levels reached by current state-of-the-art processors. Consequently, recent years have witnessed a host of studies that address the problem of reducing the energy consumption. Unfortunately, most of the energy-oriented studies are from design automation and architecture domain, and only very recently soft-based approaches to the problem have appeared in research papers. In this chapter, we take an early step in evaluating the energy consumption of a selected set of benchmarks from three different application domains. Setting off with the observation that memory energy behavior and observe the variations in cache and memory energies under different cache configurations.