Challenges in Embedded Memory Design and Test

  • Authors:
  • Erik Jan Marinissen;Betty Prince;Doris Keitel-Schulz;Yervant Zorian

  • Affiliations:
  • Philips Research Labs, The Netherlands;Memory Strategies International, Leander, TX, USA;Infineon Technologies, Munich, Germany;Virage Logic, Fremont, CA, USA

  • Venue:
  • Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
  • Year:
  • 2005

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Abstract

Both the number of embedded memories, as well as the total embedded memory content inour chips is growing steadily. Time for chip designers, EDA makers, and test engineers to update their knowledge on memories. This Hot Topic paper provides an embedded tutorial on embedded memories, in terms of what is new and coming versus what is old and vanishing, and what are the associated design, test, and repair challenges related to using embedded memories.