VLSI array processors
Moore's law: past, present, and future
IEEE Spectrum
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Your core— my problem? (panel session): integration and verification of IP
Proceedings of the 38th annual Design Automation Conference
Addressing the system-on-a-chip interconnect woes through communication-based design
Proceedings of the 38th annual Design Automation Conference
IP reuse in the system on a chip era
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Software-controlled on-chip memory for high-performance and low-power computing
ACM SIGARCH Computer Architecture News
System-on-chip beyond the nanometer wall
Proceedings of the 40th annual Design Automation Conference
Very Long Instruction Word architectures and the ELI-512
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
Computer
Computer Organization and Design
Computer Organization and Design
Design and implementation of the POWER5™ microprocessor
Proceedings of the 41st annual Design Automation Conference
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Communications of the ACM - Voting systems
3D Processing Technology and Its Impact on iA32 Microprocessors
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
Strategies for the integration of hardware and software IP components in embedded systems-on-chip
Integration, the VLSI Journal - Special issue: IP and design reuse
Thermal Modeling, Characterization and Management of On-Chip Networks
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Challenges in Embedded Memory Design and Test
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
SOC Testing Methodology and Practice
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing
Journal of VLSI Signal Processing Systems
Accelerating Mobile Video: A 64-Bit SIMD Architecture for Handheld Applications
Journal of VLSI Signal Processing Systems
Journal of VLSI Signal Processing Systems
An Efficient Picture-Rate Up-Converter
Journal of VLSI Signal Processing Systems
Power and Substrate Noise Tolerance of Configurable Embedded Memories in SoC
Journal of VLSI Signal Processing Systems
Journal of VLSI Signal Processing Systems
A Hardware/Software Co-Design of MP3 Audio Decoder
Journal of VLSI Signal Processing Systems
Power-efficient Interconnection Networks: Dynamic Voltage Scaling with Links
IEEE Computer Architecture Letters
Thermal analysis of a 3D die-stacked high-performance microprocessor
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
A Compact DSP Core with Static Floating-Point Arithmetic
Journal of VLSI Signal Processing Systems
Proceedings of the 43rd annual Design Automation Conference
Real-time Scheduling in Heterogeneous Dual-core Architectures
ICPADS '06 Proceedings of the 12th International Conference on Parallel and Distributed Systems - Volume 2
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Tackling variability and reliability challenges
IEEE Design & Test
Die Stacking (3D) Microarchitecture
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Parallel programming of multi-processor SoC: a HW-SW interface perspective
International Journal of Parallel Programming - Special Issue on Multiprocessor-based embedded systems
GALDS: a complete framework for designing multiclock ASICs and socs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A heterogeneous embedded MPSoC for multimedia applications
HPCC'06 Proceedings of the Second international conference on High Performance Computing and Communications
Reusable embedded software platform for versatile camera systems
IEEE Transactions on Consumer Electronics
Indirect test architecture for SoC testing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Rate-constrained coder control and comparison of video coding standards
IEEE Transactions on Circuits and Systems for Video Technology
Processor array design with the use of genetic algorithm
LSSC'11 Proceedings of the 8th international conference on Large-Scale Scientific Computing
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The success of system-on-a-chip (SoC) hinges upon a well-concerted integrated approach from multiple disciplines, such as device, design, and application. From the device perspective, rapidly improving VLSI technology allows the integration of billions of transistors on a single chip, thus permitting a wide range of functions to be combined on one chip. From the application perspective, numerous killer applications have been identified, which can make full use of the aforementioned functionalities provided by a single chip. From the design perspective, however, with greater device integration, system designs become more complex and are increasingly challenging to design. Moving forward, novel approaches will be needed to meet these challenges. This paper explores several new design strategies, which represent the current design trends to deal with the emerging issues. For example, recognizing the stringent requirements on power consumption, memory bandwidth/latency, and transistor variability, novel power/thermal management, multi-processor SoC, reconfigurable logic, and design for verification and testing have now been incorporated into modern system design. In addition, we look into some plausible solutions. For example, further innovations on scalable, reusable, and reliable system architectures, IP deployment and integration, on-chip interconnects, and memory hierarchies are all anticipated in the near future.