Models and languages for parallel computation
ACM Computing Surveys (CSUR)
Communications of the ACM
Going mobile: the next horizon for multi-million gate designs in the semi-conductor industry
Proceedings of the 39th annual Design Automation Conference
Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
A unified HW/SW interface model to remove discontinuities between HW and SW design
Proceedings of the 5th ACM international conference on Embedded software
Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
4G applications, architectures, design methodology and tools for MPSoC
Proceedings of the conference on Design, automation and test in Europe: Proceedings
High-Performance Embedded Computing: Architectures, Applications, and Methodologies
High-Performance Embedded Computing: Architectures, Applications, and Methodologies
Transaction-Level Modeling with Systemc: Tlm Concepts and Applications for Embedded Systems
Transaction-Level Modeling with Systemc: Tlm Concepts and Applications for Embedded Systems
Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Trend and Challenge on System-on-a-Chip Designs
Journal of Signal Processing Systems
Exploring programming model-driven QoS support for NoC-based platforms
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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For the design of classic computers the parallel programming concept is used to abstract HW/SW interfaces during high level specification of application software. The software is then adapted to existing multiprocessor platforms using a low level software layer that implements the programming model. Unlike classic computers, the design of heterogeneous MPSoC includes also building the processors and other kind of hardware components required to execute the software. In this case, the programming model hides both hard-ware and software refinements. This paper deals with parallel programming models to abstract both hardware and software interfaces in the case of heterogeneous MPSoC design. Different abstraction levels will be needed. For the long term, the use of higher level programming models will open new vistas for optimization and architecture exploration like CPU/RTOS tradeoffs.