A compilation-based software estimation scheme for hardware/software co-simulation
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Operating system based software generation for systems-on-chip
Proceedings of the 37th Annual Design Automation Conference
Component-based design approach for multicore SoCs
Proceedings of the 39th annual Design Automation Conference
Structured Computer Organization
Structured Computer Organization
RTOS Modeling for System Level Design
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Transaction Based Design: Another Buzzword or the Solution to a Design Problem?
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Software Architectural Transformations: A New Approach to Low Energy Embedded Software
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Unified Component Integration Flow for Multi-Processor SoC Design and Validation
Proceedings of the conference on Design, automation and test in Europe - Volume 2
RTK-Spec TRON: A Simulation Model of an ITRON Based RTOS Kernel in SystemC
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Enabling RTOS simulation modeling in a system level design language
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
ISS-centric modular HW/SW co-simulation
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Programming models and HW-SW interfaces abstraction for multi-processor SoC
Proceedings of the 43rd annual Design Automation Conference
Interrupt modeling for efficient high-level scheduler design space exploration
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Parallel programming of multi-processor SoC: a HW-SW interface perspective
International Journal of Parallel Programming - Special Issue on Multiprocessor-based embedded systems
Efficient implementation of native software simulation for MPSoC
Proceedings of the conference on Design, automation and test in Europe
Using a dataflow abstracted virtual prototype for HdS-design
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
TLM+ modeling of embedded HW/SW systems
Proceedings of the Conference on Design, Automation and Test in Europe
| Hi-index | 0.00 |
In this paper, we propose a methodology to perform early design stage validation of hardware/software (HW/SW) systems using a HW/SW interface simulation model. Given a SW application described at the OS abstraction level and a HW Platform described at an arbitrary abstraction level, we aim at providing the adaptation layer, i.e. simulation model of the HW/SW interface, which will enable the timed HW/SW cosimulation of the entire system at an early design stage before the system design is completed. Experimental results show that our approach is easy to use and efficient while providing fast simulation (up to 3 orders of magnitude faster than a HW/SW cosimulation with instruction set simulator, ISS) and accuracy (86% compared with a HW/SW cosimulation with ISS).