Encyclopedia of graphics file formats (2nd ed.)
Encyclopedia of graphics file formats (2nd ed.)
StepNP: A System-Level Exploration Platform for Network Processors
IEEE Design & Test
A complexity effective communication model for behavioral modeling of signal processing applications
Proceedings of the 40th annual Design Automation Conference
System-on-chip beyond the nanometer wall
Proceedings of the 40th annual Design Automation Conference
A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory
Proceedings of the 40th annual Design Automation Conference
Performance Evaluation of Two Emerging Media Processors: VIRAM and Imagine
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Networks on chip
Programmable Stream Processors
Computer
Computer
Hardware support for real-time operating systems
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding
Proceedings of the conference on Design, automation and test in Europe - Volume 3
A comparison of the RTU hardware RTOS with a hardware/software RTOS
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Proceedings of the conference on Design, automation and test in Europe: Proceedings
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Static power modeling of 32-bit microprocessors
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Programming models and HW-SW interfaces abstraction for multi-processor SoC
Proceedings of the 43rd annual Design Automation Conference
A hardware/software framework for supporting transactional memory in a MPSoC environment
ACM SIGARCH Computer Architecture News
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Parallel programming of multi-processor SoC: a HW-SW interface perspective
International Journal of Parallel Programming - Special Issue on Multiprocessor-based embedded systems
Platform-based software design flow for heterogeneous MPSoC
ACM Transactions on Embedded Computing Systems (TECS)
SystemClick: a domain-specific framework for early exploration using functional performance models
Proceedings of the 45th annual Design Automation Conference
Proceedings of the conference on Design, automation and test in Europe
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Journal of Systems and Software
Multiprocessor, Multithreading and Memory Optimization for On-Chip Multimedia Applications
Journal of Signal Processing Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hardware/software codesign for embedded implementation of neural networks
ARC'07 Proceedings of the 3rd international conference on Reconfigurable computing: architectures, tools and applications
Integrating real-time inter-task communication channels into hardware-software codesign
Microprocessors & Microsystems
A synergetic operating unit on NoC layer for CMP system
International Journal of High Performance Systems Architecture
A NoC-based hybrid message-passing/shared-memory approach to CMP design
Microprocessors & Microsystems
EURASIP Journal on Embedded Systems
Programming challenges & solutions for multi-processor SoCs: an industrial perspective
Proceedings of the 48th Design Automation Conference
An efficient architectural design of hardware interface for heterogeneous multi-core system
NPC'11 Proceedings of the 8th IFIP international conference on Network and parallel computing
A comprehensive integration infrastructure for embedded system design
Microprocessors & Microsystems
Integrating Memory Optimization with Mapping Algorithms for Multi-Processors System-on-Chip
ACM Transactions on Embedded Computing Systems (TECS)
Parallel programming patterns for multi-processor SoC: Application to video processing
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
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The MultiFlex system is an application-to-platform mapping tool that integrates heterogeneous parallel components-- H/W or S/W-- into a homogeneous platform programming environment. This leads to higher quality designs through encapsulation and abstraction. Two high-level parallel programming models are supported by the following MultiFlex platform mapping tools: a distributed system object component (DSOC) object-oriented message passing model and a symmetrical multiprocessing (SMP) model using shared memory. We demonstrate the combined use of the MultiFlex multiprocessor mapping tools, supported by high-speed hardware-assisted messaging, context-switching, and dynamic scheduling using the StepNP demonstrator multiprocessor system-on-chip platform, for two representative applications: 1) an Internet traffic management application running at 2.5 Gb/s and 2) an MPEG4 video encoder (VGA resolution, at 30 frames/s). For these applications, a combination of the DSOC and SMP programming models were used in interoperable fashion. After optimization and mapping, processor utilization rates of 85%-91% were demonstrated for the traffic manager. For the MPEG4 decoder, the average processor utilization was 88%.