Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
ACM Transactions on Computer Systems (TOCS)
Proceedings of the conference on Design, automation and test in Europe
On-chip communication architecture for OC-768 network processors
Proceedings of the 38th annual Design Automation Conference
FlexWare: A Retargetable Embedded-Software Development Environment
IEEE Design & Test
System-on-chip beyond the nanometer wall
Proceedings of the 40th annual Design Automation Conference
A modular simulation framework for architectural exploration of on-chip interconnection networks
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Transaction level modeling: an overview
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding
Proceedings of the conference on Design, automation and test in Europe - Volume 3
OCCN: A Network-On-Chip Modeling and Simulation Framework
Proceedings of the conference on Design, automation and test in Europe - Volume 3
OCCN: a NoC modeling framework for design exploration
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Networks on chip
Extending the transaction level modeling approach for fast communication architecture exploration
Proceedings of the 41st annual Design Automation Conference
Space: a hardware/software systemC modeling platform including an RTOS
Languages for system specification
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Network Processing Challenges and an Experimental NPU Platform
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Plug-in of power models in the StepNP exploration platform: analysis of power/performance trade-offs
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
Modular domain-specific implementation and exploration framework for embedded software platforms
Proceedings of the 42nd annual Design Automation Conference
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Exploiting TLM and object introspection for system-level simulation
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Decision-theoretic exploration of multiProcessor platforms
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
A hierarchical modeling framework for on-chip communication architectures of multiprocessing SoCs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Performance Evaluation of Packet Processing Architectures Using Multiclass Queuing Networks
ANSS '06 Proceedings of the 39th annual Symposium on Simulation
HW-SW emulation framework for temperature-aware design in MPSoCs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Interactive presentation: Hard- and software modularity of the NOVA MPSoC platform
Proceedings of the conference on Design, automation and test in Europe
Cache coherency communication cost in a NoC-based MPSoC platform
Proceedings of the 20th annual conference on Integrated circuits and systems design
Fast exploration of bus-based communication architectures at the CCATB abstraction
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Reliable performance analysis of a multicore multithreaded system-on-chip
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Multi-Processor SoC-Based Design Methodologies Using Configurable and Extensible Processors
Journal of Signal Processing Systems
A performance model for network processor architectures in packet processing system
PDCS '07 Proceedings of the 19th IASTED International Conference on Parallel and Distributed Computing and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
System level simulation of autonomic SoCs with TAPES
ARCS'08 Proceedings of the 21st international conference on Architecture of computing systems
Hardware/software support for adaptive work-stealing in on-chip multiprocessor
Journal of Systems Architecture: the EUROMICRO Journal
Bounding the shared resource load for the performance analysis of multiprocessor systems
Proceedings of the Conference on Design, Automation and Test in Europe
Real-time performance analysis of multiprocessor systems with shared memory
ACM Transactions on Embedded Computing Systems (TECS)
Analysis of a reconfigurable network processor
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
A flexible hybrid simulation platform targeting multiple configurable processors SoC
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
A unified design space simulation environment for network-on-chip: fuse-N
International Journal of High Performance Systems Architecture
Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Emulation-based transient thermal modeling of 2D/3D systems-on-chip with active cooling
Microelectronics Journal
Embedded Systems Design
SystemQ: a queuing-based approach to architecture performance evaluation with systemc
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools
Exploring design space using transaction level models
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
A full lifecycle performance verification methodology for multicore systems-on-chip
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
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The fast-changing communications market requires high-performance yet flexible network-processingplatforms. StepNP is an exploratory network processor simulation environment for exploring applications, multiprocessor network-processing architectures, and SoC tools. Supporting model interaction, instrumentation, and analysis, the platform lets R&D teams easily add new processors, coprocessors, and interconnects.