Design and validation of computer protocols
Design and validation of computer protocols
Scalability of parallel machines
Communications of the ACM
Real-time object-oriented modeling
Real-time object-oriented modeling
The PowerPC performance modeling methodology
Communications of the ACM
Error control systems for digital communication and storage
Error control systems for digital communication and storage
DAC '97 Proceedings of the 34th annual Design Automation Conference
STATS: a framework for microprocessor and system-level design space exploration
Journal of Systems Architecture: the EUROMICRO Journal - Special double issue on microprocessor architecture
Proceedings of the 37th Annual Design Automation Conference
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A generic architecture for on-chip packet-switched interconnections
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Addressing the system-on-a-chip interconnect woes through communication-based design
Proceedings of the 38th annual Design Automation Conference
Computer Networks
StepNP: A System-Level Exploration Platform for Network Processors
IEEE Design & Test
Coping with Latency in SOC Design
IEEE Micro
A survey of techniques for energy efficient on-chip communication
Proceedings of the 40th annual Design Automation Conference
Evaluation of the Traffic-Performance Characteristics of System-on-Chip Communication Architectures
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
System Design: Traditional Concepts and New Paradigms
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
Low Power Error Resilient Encoding for On-Chip Data Buses
Proceedings of the conference on Design, automation and test in Europe
Networks on chip
Software for multiprocessor networks on chip
Networks on chip
Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
IPSIM: SystemC 3.0 Enhancements for Communication Refinement
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Towards on-chip fault-tolerant communication
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
System-level performance analysis for designing on-chip communication architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Theory of latency-insensitive design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Design space exploration for optimizing on-chip communication architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
GALS networks on chip: a new solution for asynchronous delay-insensitive links
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
Fast, Accurate and Detailed NoC Simulations
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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The On-Chip Communication Network (OCCN) project provides an efficient framework, developed within SourceForge, for the specification, modeling, simulation, and design exploration of network on-chip based on an object-oriented C++ library built on top of SystemC. OCCN is shaped by our experience in developing communication architectures for different System-on-Chip. OCCN increases the productivity of developing communication driver models through the definition of a universal Application Programming Interface (API). This API provides a new design pattern that enables creation and reuse of executable transaction level models across a variety of SystemC-based environments and simulation platforms. It also addresses model portability, simulation platform independence, interoperability, and high-level performance modeling issues.