Methodology for hardware/software co-verification in C/C++ (short paper)
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
MicroC/OS-II: the real-time kernel
MicroC/OS-II: the real-time kernel
System Design with SystemC
StepNP: A System-Level Exploration Platform for Network Processors
IEEE Design & Test
Multiprocessor SoC Platforms: A Component-Based Design Approach
IEEE Design & Test
Integration of Instruction Set Simulators into SystemC High Level Models
DSD '02 Proceedings of the Euromicro Symposium on Digital Systems Design
Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip
ICCD '02 Proceedings of the 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD'02)
RTOS Modeling for System Level Design
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Systemic Embedded Software Generation from SystemC
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
A SystemC Refinement Methodology for Embedded Software
IEEE Design & Test
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This work attempts to enhance the support of embedded software modeling with SystemC 2.0. We propose a top-down approach that first. lets designers specify their application in SystemC at a high abstraction level through a set of connected modules, and simulate the whole system. Then, the application is partitioned in two parts: software and hardware modules. Each partition can be connected to our platform that includes a commercial RTOS executed by an ARM ISS scheduled by the SystemC simulator. One of our major contributions is that we can easily move a module from hardware to software (and vice versa) to allow architectural exploration.