Integration of Instruction Set Simulators into SystemC High Level Models

Authors:
Ilia Oussorov;Wolfgang Raab;Ulrich Hachmann;Alex Kravtsov
Affiliations:
-;-;-;-
Venue:
DSD '02 Proceedings of the Euromicro Symposium on Digital Systems Design
Year:
2002

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Cited 2

A SystemC-Based Modular Design and Verification Framework for C-Model Reuse in a HW/SW-Co-Design Flow

ICDCSW '04 Proceedings of the 24th International Conference on Distributed Computing Systems Workshops - W7: EC (ICDCSW'04) - Volume 7
Space: a hardware/software systemC modeling platform including an RTOS

Languages for system specification

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Abstract

This paper discusses the integration of instruction set simulators (ISS) for processor cores into high-level system models. The approaches to providing data communication between high level modules and ISS are addressed as well as the synchronization between these parts.