ACM Transactions on Computer Systems (TOCS)
StepNP: A System-Level Exploration Platform for Network Processors
IEEE Design & Test
Flexible Control of Parallelism in a Multiprocessor PC Router
Proceedings of the General Track: 2002 USENIX Annual Technical Conference
Comparing Analytical Modeling with Simulation for Network Processors: A Case Study
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
Modular domain-specific implementation and exploration framework for embedded software platforms
Proceedings of the 42nd annual Design Automation Conference
Modular Reference Implementation of an IP-DSLAM
ISCC '05 Proceedings of the 10th IEEE Symposium on Computers and Communications
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The Network-Optimized Versatile Architecture Platform (NOVA) encapsulates embedded cores, tightly and loosely coupled coprocessors, on-chip memories, and I/O interfaces by special sockets that provide a common packet passing and communication infrastructure. To ease the programming of the heterogeneous multiprocessor target for the application developer, a component based framework is used for describing packet processing applications in a natural and productive way. Leveraging identical application and hardware communication semantics, code generators and off-the-shelf tool chains can automate the software implementation process. Using a prototype with four processing cores we quantify the overhead of modularity and programmability for the platform.