StepNP: A System-Level Exploration Platform for Network Processors
IEEE Design & Test
Multiprocessor SoC Platforms: A Component-Based Design Approach
IEEE Design & Test
Design and programming of embedded multiprocessors: an interface-centric approach
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Trials and Tribulations of Debugging Concurrency
Queue - RFID
A SystemC Refinement Methodology for Embedded Software
IEEE Design & Test
Overview of the MPSoC design challenge
Proceedings of the 43rd annual Design Automation Conference
Cutting across layers of abstraction:: removing obstacles from the advancement of embedded systems
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Designing SOCs with Configured Cores: Unleashing the Tensilica Xtensa and Diamond Cores (Systems on Silicon)
Customizable Embedded Processors: Design Technologies and Applications
Customizable Embedded Processors: Design Technologies and Applications
Building ASIPs: The Mescal Methodology
Building ASIPs: The Mescal Methodology
Transaction-Level Modeling with Systemc: Tlm Concepts and Applications for Embedded Systems
Transaction-Level Modeling with Systemc: Tlm Concepts and Applications for Embedded Systems
Simulink-based MPSoC design flow: case study of Motion-JPEG and H.264
Proceedings of the 44th annual Design Automation Conference
ESL Design and Verification: A Prescription for Electronic System Level Methodology
ESL Design and Verification: A Prescription for Electronic System Level Methodology
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The growing interest in multiprocessor system-on-chip (MPSoC) design, or `multicore' processors, has resulted in some confusion between the various types of multiprocessor architectures and their suitability in different application spaces. In particular, there are clear differences between the general-purpose, symmetric multiprocessor (SMP) approaches, and the application-specific, asymmetric multiprocessor (AMP) architectures. Configurable and extensible processors are especially suited for the AMP approach, yet their flexibility means that new design methodologies and tools must be developed to allow effective utilisation of multiple instruction-set processors in a complex design. Configurable and extensible processors are especially well suited for data-intensive computational tasks, such as are found in many signal and image processing applications, including audio, video, and wireless and wired networking. A design methodology for such applications must pay careful attention to the right programming models, and dataflow styles of processing seem a natural fit to the application space. In this paper, we describe a design methodology, flow and tools for MPSoC design using configurable and extensible processors that is especially interesting for data-intensive dataflow style applications. Some of the issues involved in this design approach are used to highlight opportunities for ongoing research.