SESAM/Par4All: a tool for joint exploration of MPSoC architectures and dynamic dataflow code generation

Authors:
N. Ventroux;T. Sassolas;A. Guerre;B. Creusillet;R. Keryell
Affiliations:
CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette CEDEX, France;CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette CEDEX, France;CEA, LIST, Embedded Computing Laboratory, Gif-sur-Yvette CEDEX, France;HPC Project, route du Colonel Marcel Moraine, Meudon la Forêt, France;HPC Project, route du Colonel Marcel Moraine, Meudon la Forêt, France
Venue:
Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools
Year:
2012

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Abstract

Due to the increasing complexity of new multiprocessor systems on chip, flexible and accurate simulators become a necessity for exploring the vast design space solution. In a streaming execution model, only a well-balanced pipeline can lead to an efficient implementation. However with dynamic applications, each stage is prone to execution time variations. Only a joint exploration of the application space of parallelization possibilities, together with the possible MPSoC architectural choices, can lead to an efficient embedded system. In this paper, we associate a semi-automatic parallelization workflow based on the Par4All retargetable compiler, to the SESAM environment. This new framework can ease the application exploration and find the best tradeoffs between complexity and performance for asymmetric homogeneous MPSoCs and dynamic streaming application processing. A use case is performed with a radio sensing application implemented on a complete MPSoC platform.