Proceedings of the 6th international workshop on Hardware/software codesign
The iSLIP scheduling algorithm for input-queued switches
IEEE/ACM Transactions on Networking (TON)
Combined Task and Message Scheduling in Distributed Real-Time Systems
IEEE Transactions on Parallel and Distributed Systems
Towards a taxonomy of software connectors
Proceedings of the 22nd international conference on Software engineering
QNoC: QoS architecture and design process for network on chip
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Networks on chip
A Switched Ethernet Protocol for Hard Real-Time Embedded System Applications
AINA '05 Proceedings of the 19th International Conference on Advanced Information Networking and Applications - Volume 2
Full TCP/IP for 8-bit architectures
Proceedings of the 1st international conference on Mobile systems, applications and services
Efficient communication between the embedded processor and the reconfigurable logic on an FPGA
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Architectural partitioning for system level synthesis of integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Design of high-performance system-on-chips using communication architecture tuners
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Codesign in system on chip (SoC) systems is a joint development of hardware and software tasks to obtain a complete system design. Especially, a key problem in the hardware-software codesign for real-time embedded systems is related to the time-bounded communication channel that guarantees the deadlines of tasks, as well as the timely delivery of messages exchanged between tasks. This paper presents a technique to integrate a real-time inter-task communication channel into hardware-software codesign. The real-time inter-task communication channel presented in this paper is addressed from two perspectives: a unified inter-task communication interface and a combined task and message scheduling scheme. From the perspective of an inter-task communication interface, we consider three possible inter-task communication associations, software-to-software, software-to-hardware, and hardware-to-hardware task communication associations. Tasks and messages exploited in real-time inter-task communications are allowed to have periodic and aperiodic properties. In the unified inter-task communication interface, coarse-grained real-time processing is allowed at a level of task unit and fine-grained real-time processing is allowed at a piece of message frame unit. Consequently, periodic tasks and messages need to be timely processed and delivered to meet their deadlines, and aperiodic tasks and messages need to be quickly processed for fast response without missing periodic task and message deadlines. We present a novel scheduling policy from the perspective of the combined task and message scheduling scheme. In the scheduling policy, the first objective is to meet the timing constraints of periodic tasks as well as periodic messages simultaneously for given application-specific real-time requirements. The second objective is to improve the response time of aperiodic messages. We evaluated the performance of the proposed technique after implementing it on a commercial SoC platform. The experimental evaluation showed it yielded efficient performance in terms of the minimal deadline miss ratio of periodic tasks and messages, and a fast average response time for aperiodic messages.