Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Models and languages for parallel computation
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Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
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A D&T Roundtable: Are Single-Chip Multiprocessors in Reach?
IEEE Design & Test
Colif: A Design Representation for Application-Specific Multiprocessor SOCs
IEEE Design & Test
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Proceedings of the tenth international symposium on Hardware/software codesign
Schedulers as model-based design elements in programmable heterogeneous multiprocessors
Proceedings of the 40th annual Design Automation Conference
A Layered, Codesign Virtual Machine Approach to Modeling Computer Systems
Proceedings of the conference on Design, automation and test in Europe
Layered, Multi-Threaded, High-Level Performance Design
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Benchmark-based design strategies for single chip heterogeneous multiprocessors
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Scenario-Oriented Design for Single Chip Heterogeneous Multiprocesso
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 10 - Volume 11
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
Power-Performance Simulation and Design Strategies for Single-Chip Heterogeneous Multiprocessors
IEEE Transactions on Computers
A New Type of Embedded File System Based on SPM
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Scenario-oriented design for single-chip heterogeneous multiprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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System-on-chip (SoC) designs have the potential to change the way we organize computation. This potential has gone unrealized. Future SoCs will have multiple heterogeneous processing elements, most likely organized around an on-chip network. Thus, SoCs are increasingly modeled as systems in the large. But a chip also has a fixed set of programmable hardware elements that are much more closely coupled than for systems in the large. New application types will require the chip to be considered programmable along with the individual processing elements on the chip. New programmers' views of SoCs are required to capture this new design space. A set of primitives for next generation design languages that support the development of new programmers' views of SoCs is motivated.