New directions in compiler technology for embedded systems (embedded tutorial)

  • Authors:

  • Nikil Dutt;Alex Nicolau;Hiroyuki Tomiyama;Ashok Halambi

  • Affiliations:

  • Architectures and Compilers for Embedded System Laboratory, Center for Embedded Systems, University of California, Irvine, Irvine, CA;Architectures and Compilers for Embedded System Laboratory, Center for Embedded Systems, University of California, Irvine, Irvine, CA;Architectures and Compilers for Embedded System Laboratory, Center for Embedded Systems, University of California, Irvine, Irvine, CA;Architectures and Compilers for Embedded System Laboratory, Center for Embedded Systems, University of California, Irvine, Irvine, CA

  • Venue:
  • Proceedings of the 2001 Asia and South Pacific Design Automation Conference
  • Year:
  • 2001

Quantified Score

Hi-index 0.00

Visualization

Abstract

Traditionally, compiler technology has focused on the generation of code with the goal of improving performance for a variety of applications running on general-purpose processor architectures. In the embedded system space, compiler technology is faced with many new challenges, including: code generation for specialized architectural features, requireing a highly flexible degree of retargetability; memory-aware code generation that exploits the timing and structure of the embedded system's memory organization; optimizing software to meet both real-time and performance constraints; energy- and power-aware software generation, both from the context of energy minimization, as well as power modulation; code size minimization for memory-constrained embedded systems; coarse-grain transformations for tightly-coupled, memory-constrained multi-processor architectures; and interaction with the operating system for active management of embedded system resources. This paper discusses new directions for compiler technology, surveys some of the current research efforts and illustrates proposed solutions to selected issues.