New directions in compiler technology for embedded systems (embedded tutorial)
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
A Complete Compiler Approach to Auto-Parallelizing C Programs for Multi-DSP Systems
IEEE Transactions on Parallel and Distributed Systems
Synthesis of time-constrained multitasking embedded software
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Proceedings of the 19th international conference on Parallel architectures and compilation techniques
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Due to the technological advances, mapping of embedded applications onto single-chip multi-processor systems becomes a feasible and very interesting option. What is needed is an environment that supports the designer in transforming an algorithmic specification into a suitable parallel implementation. In this paper we present the results of our experiments with one such an environment, which we developed within our laboratory. As opposed to the existing ones, our framework semi-automatically exploits different kinds of coarse and fine-grain parallelism from an embedded program written in ANSI C. It employs functional pipelining and data set partitioning simultaneously with source-to-source program transformations to obtain the most advantageous hierarchical parallelizations. This combination results in high speedups for all tested benchmarks.