Bulldog: a compiler for VLSI architectures
Bulldog: a compiler for VLSI architectures
Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Register allocation via hierarchical graph coloring
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
Optimizing stack frame accesses for processors with restricted addressing modes
Software—Practice & Experience
Analyzing and compressing assembly code
SIGPLAN '84 Proceedings of the 1984 SIGPLAN symposium on Compiler construction
The Art of Programming Embedded Systems
The Art of Programming Embedded Systems
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
The SUIF Compiler System: a Parallelizing and Optimizing Research Compiler
The SUIF Compiler System: a Parallelizing and Optimizing Research Compiler
A compiler for application-specific signal processors
A compiler for application-specific signal processors
Code generation and optimization for embedded digital signal processors
Code generation and optimization for embedded digital signal processors
Analysis and evaluation of address arithmetic capabilities in custom DSP architectures
DAC '97 Proceedings of the 34th annual Design Automation Conference
A new viewpoint on code generation for directed acyclic graphs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Addressing optimization for loop execution targeting DSP with auto-increment/decrement architecture
Proceedings of the 11th international symposium on System synthesis
Development of an optimizing compiler for a Fujitsu fixed-point digital signal processor
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Storage assignment optimizations to generate compact and efficient code on embedded DSPs
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Enhanced code compression for embedded RISC processors
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Minimizing cost of local variables access for DSP-processors
Proceedings of the ACM SIGPLAN 1999 workshop on Languages, compilers, and tools for embedded systems
Proceedings of the 27th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
New directions in compiler technology for embedded systems (embedded tutorial)
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Storage allocation for embedded processors
CASES '01 Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
Compiling with code-size constraints
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Address assignment combined with scheduling in DSP code generation
Proceedings of the 39th annual Design Automation Conference
Readings in hardware/software co-design
A Framework for Enhancing Code Quality in Limited Register Set Embedded Processors
LCTES '00 Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
Optimal Live Range Merge for Address Register Allocation in Embedded Programs
CC '01 Proceedings of the 10th International Conference on Compiler Construction
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Storage assignment optimizations through variable coalescence for embedded processors
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Address code generation for DSP instruction-set architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Simple offset assignment in presence of subword data
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Efficient spill code for SDRAM
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Compiling with code-size constraints
ACM Transactions on Embedded Computing Systems (TECS)
Power-efficient prefetching via bit-differential offset assignment on embedded processors
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Optimizing Address Code Generation for Array-Intensive DSP Applications
Proceedings of the international symposium on Code generation and optimization
An ILP based approach to address code generation for digital signal processors
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
DSP address optimization using evolutionary algorithms
SCOPES '05 Proceedings of the 2005 workshop on Software and compilers for embedded systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Offset assignment using simultaneous variable coalescing
ACM Transactions on Embedded Computing Systems (TECS)
Power-efficient prefetching for embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
Memory Offset Assignment for DSPs
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
Improving code compression using clustered modalities
Proceedings of the 46th Annual Southeast Regional Conference on XX
An optimization framework for embedded processors with auto-addressing mode
ACM Transactions on Programming Languages and Systems (TOPLAS)
An efficient code update scheme for DSP applications in mobile embedded systems
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
Evaluation of offset assignment heuristics
HiPEAC'07 Proceedings of the 2nd international conference on High performance embedded architectures and compilers
Address register assignment for reducing code size
CC'03 Proceedings of the 12th international conference on Compiler construction
Evaluating address register assignment and offset assignment algorithms
ACM Transactions on Embedded Computing Systems (TECS)
Solving the simple offset assignment problem as a traveling salesman
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
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DSP architectures typically provide indirect addressing modes with autoincrement and decrement. In addition, indexing mode is generally not available, and there are usually few, if any, general-purpose registers. Hence, it is necessary to use address registers and perform address arithmetic to access automatic variables. Subsuming the address arithmetic into autoincrement and decrement modes improves the size of the generated code. In this article we present a formulation of the problem of optimal storage assignment such that explicit instructions for address arithmetic are minimized. We prove that for the case of a single address register the decision problem is NP-complete, even for a single basic block. We then generalize the problem to multiple address registers. For both cases heuristic algorithms are given, and experimental results are presented.