Optimizing stack frame accesses for processors with restricted addressing modes
Software—Practice & Experience
Storage assignment to decrease code size
ACM Transactions on Programming Languages and Systems (TOPLAS)
Algorithms for address assignment in DSP code generation
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Analysis and evaluation of address arithmetic capabilities in custom DSP architectures
DAC '97 Proceedings of the 34th annual Design Automation Conference
A uniform optimization technique for offset assignment problems
Proceedings of the 11th international symposium on System synthesis
Storage assignment optimizations to generate compact and efficient code on embedded DSPs
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Address assignment combined with scheduling in DSP code generation
Proceedings of the 39th annual Design Automation Conference
DSP Processor Fundamentals: Architectures and Features
DSP Processor Fundamentals: Architectures and Features
Maté: a tiny virtual machine for sensor networks
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Storage assignment optimizations through variable coalescence for embedded processors
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Efficient code distribution in wireless sensor networks
WSNA '03 Proceedings of the 2nd ACM international conference on Wireless sensor networks and applications
The dynamic behavior of a data dissemination protocol for network programming at scale
SenSys '04 Proceedings of the 2nd international conference on Embedded networked sensor systems
Run-time dynamic linking for reprogramming wireless sensor networks
Proceedings of the 4th international conference on Embedded networked sensor systems
Offset assignment using simultaneous variable coalescing
ACM Transactions on Embedded Computing Systems (TECS)
UCC: update-conscious compilation for energy efficiency in wireless sensor networks
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
Address register assignment for reducing code size
CC'03 Proceedings of the 12th international conference on Compiler construction
Offset assignment showdown: evaluation of DSP address code optimization algorithms
CC'03 Proceedings of the 12th international conference on Compiler construction
FlexCup: a flexible and efficient code update mechanism for sensor networks
EWSN'06 Proceedings of the Third European conference on Wireless Sensor Networks
An ILP solution to address code generation for embedded applications on digital signal processors
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
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DSP processors usually provide dedicated address generation units (AGUs) to assist address computation. By carefully allocating variables in the memory, DSP compilers take advantage of AGUs and generate efficient code with compact size and improved performance. However, DSP applications running on mobile embedded systems often need to be updated after their initial releases. Studies showed that small changes at the source code level may significantly change the variable layout in the memory and thus the binary code, which causes large energy overheads to mobile embedded systems that patch through wireless or satellite communication, and often pecuniary burden to the users. In this paper, we propose an update-conscious code update scheme to effectively reduce patch size. It first performs incremental offset assignment based on a recent variable coalescing heuristic, and then summarizes the code difference using two types of update primitives. Our experimental results showed that using update-conscious code update can greatly improve code similarity and thus reduce the update script sizes.