Optimizing stack frame accesses for processors with restricted addressing modes
Software—Practice & Experience
Storage assignment to decrease code size
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Address calculation for retargetable compilation and exploration of instruction-set architectures
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Code generation and optimization for embedded digital signal processors
Code generation and optimization for embedded digital signal processors
Code generation for core processors
DAC '97 Proceedings of the 34th annual Design Automation Conference
Analysis and evaluation of address arithmetic capabilities in custom DSP architectures
DAC '97 Proceedings of the 34th annual Design Automation Conference
DSP address optimization using a minimum cost circulation technique
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
A uniform optimization technique for offset assignment problems
Proceedings of the 11th international symposium on System synthesis
Addressing optimization for loop execution targeting DSP with auto-increment/decrement architecture
Proceedings of the 11th international symposium on System synthesis
Storage assignment optimizations to generate compact and efficient code on embedded DSPs
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Minimizing cost of local variables access for DSP-processors
Proceedings of the ACM SIGPLAN 1999 workshop on Languages, compilers, and tools for embedded systems
Function inlining under code size constraints for embedded processors
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Analysis of high-level address code transformations for programmable processors
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Energy-efficient code generation for DSP56000 family (poster session)
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Register-constrained address computation in DSP programs
Proceedings of the conference on Design, automation and test in Europe
Register allocation for common subexpressions in DSP data paths
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Optimized address assignment for DSPs with SIMD memory accesses
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Scheduling-based code size reduction in processors with indirect addressing mode
Proceedings of the ninth international symposium on Hardware/software codesign
Data and memory optimization techniques for embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Address code generation for digital signal processors
Proceedings of the 38th annual Design Automation Conference
Proceedings of the 14th international symposium on Systems synthesis
Code generation for embedded processors
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Compiling with code-size constraints
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Address assignment combined with scheduling in DSP code generation
Proceedings of the 39th annual Design Automation Conference
Embedded software in real-time signal processing systems: design technologies
Readings in hardware/software co-design
Readings in hardware/software co-design
Improving Offset Assignment on Embedded Processors Using Transformations
HiPC '00 Proceedings of the 7th International Conference on High Performance Computing
Improving Offset Assignment for Embedded Processors
LCPC '00 Proceedings of the 13th International Workshop on Languages and Compilers for Parallel Computing-Revised Papers
Compiler optimization on VLIW instruction scheduling for low power
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Storage assignment optimizations through variable coalescence for embedded processors
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Address code generation for DSP instruction-set architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Address Code and Arithmetic Optimizations for Embedded Systems
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Simple offset assignment in presence of subword data
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Efficient spill code for SDRAM
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Compiling with code-size constraints
ACM Transactions on Embedded Computing Systems (TECS)
Power-efficient prefetching via bit-differential offset assignment on embedded processors
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Optimizing Address Code Generation for Array-Intensive DSP Applications
Proceedings of the international symposium on Code generation and optimization
Specific optimization features in a C compiler for DSPs
Programming and Computing Software
Reducing code size through address register assignment
ACM Transactions on Embedded Computing Systems (TECS)
DSP address optimization using evolutionary algorithms
SCOPES '05 Proceedings of the 2005 workshop on Software and compilers for embedded systems
Offset assignment using simultaneous variable coalescing
ACM Transactions on Embedded Computing Systems (TECS)
Power-efficient prefetching for embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
A new heuristic for SOA problem based on effective tie break function
SCOPES '08 Proceedings of the 11th international workshop on Software & compilers for embedded systems
Memory Offset Assignment for DSPs
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
Function Inlining in Embedded Systems with Code Size Limitation
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
Address Generation Optimization for Embedded High-Performance Processors: A Survey
Journal of Signal Processing Systems
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
An optimization framework for embedded processors with auto-addressing mode
ACM Transactions on Programming Languages and Systems (TOPLAS)
An efficient code update scheme for DSP applications in mobile embedded systems
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
Usability evaluation of Korean e-government portal
UAHCI'07 Proceedings of the 4th international conference on Universal access in human-computer interaction: applications and services
Evaluation of offset assignment heuristics
HiPEAC'07 Proceedings of the 2nd international conference on High performance embedded architectures and compilers
Address register assignment for reducing code size
CC'03 Proceedings of the 12th international conference on Compiler construction
Offset assignment showdown: evaluation of DSP address code optimization algorithms
CC'03 Proceedings of the 12th international conference on Compiler construction
Evaluating address register assignment and offset assignment algorithms
ACM Transactions on Embedded Computing Systems (TECS)
Storage Optimization through Offset Assignment with Variable Coalescing
ACM Transactions on Embedded Computing Systems (TECS)
An ILP solution to address code generation for embedded applications on digital signal processors
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
On Heuristic Solutions to the Simple Offset Assignment Problem in Address-Code Optimization
ACM Transactions on Embedded Computing Systems (TECS)
Minimizing address arithmetic instructions in embedded applications on DSPs
Computers and Electrical Engineering
Solving the simple offset assignment problem as a traveling salesman
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
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This paper presents DSP code optimization techniques, which originate from dedicated memory address generation hardware. We define a generic model of DSP address generation units. Based on this model, we present efficient heuristics for computing memory layouts for program variables, which optimize utilization of parallel address generation units. Improvements and generalizations of previous work are described, and the efficacy of the proposed algorithms is demonstrated through experimental evaluation.