Optimizing stack frame accesses for processors with restricted addressing modes
Software—Practice & Experience
Algorithms for address assignment in DSP code generation
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Storage assignment optimizations to generate compact and efficient code on embedded DSPs
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Address code generation for digital signal processors
Proceedings of the 38th annual Design Automation Conference
Address assignment combined with scheduling in DSP code generation
Proceedings of the 39th annual Design Automation Conference
Code Optimization Techniques for Embedded Processors: Methods, Algorithms, and Tools
Code Optimization Techniques for Embedded Processors: Methods, Algorithms, and Tools
Improving Offset Assignment for Embedded Processors
LCPC '00 Proceedings of the 13th International Workshop on Languages and Compilers for Parallel Computing-Revised Papers
Code generation and optimization for embedded digital signal processors
Code generation and optimization for embedded digital signal processors
Memory optimization techniques for embedded systems
Memory optimization techniques for embedded systems
A new heuristic for SOA problem based on effective tie break function
SCOPES '08 Proceedings of the 11th international workshop on Software & compilers for embedded systems
Memory Offset Assignment for DSPs
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
Usability evaluation of Korean e-government portal
UAHCI'07 Proceedings of the 4th international conference on Universal access in human-computer interaction: applications and services
Offset assignment showdown: evaluation of DSP address code optimization algorithms
CC'03 Proceedings of the 12th international conference on Compiler construction
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The increasing demand for more functionality in embedded systems applications nowadays requires efficient generation of compact code for embedded DSP processors. Because such processors have highly irregular data-paths, compilers targeting those processors are challenged with the automatic generation of optimized code with competent quality comparable to hand-crafted code. A major issue in code-generation is to optimize the placement of program variables in ROM relative to each other so as to reduce the overhead instructions dedicated for address computations. Modern DSP processors are typically shipped with a feature called Address Generation Unit (AGU) that provides efficient address-generation instructions for accessing program variables. Compilers targeting those processors are expected to exploit the AGU to optimize variables assignment. This article focuses on one of the basic offset-assignment problems; the Simple Offset Assignment (SOA) problem, where the AGU has only one Address Register and no Modify Registers. The notion of Tie-Break Function, TBF, introduced by Leupers and Marwedel [1996], has been used to guide the placement of variables in memory. In this article, we introduce a more effective form of the TBF; the Effective Tie-Breaking Function, ETBF, and show that the ETBF is better at guiding the variables placement process. Underpinning ETBF is the fact that program variables are placed in memory in sequence, with each variable having only two neighbors. We applied our technique to randomly generated graphs as well as to real-world code from the OffsetStone testbench [2010]). In previous work [Ali et al. 2008], our technique showed up to 7% reduction in overhead when applied to randomly-generated problem instances. We report in this article on a further experiment of our technique on real-code from the Offsetstone testbench. Despite the substantial improvement our technique has achieved when applied to random problem instances, we found that it shows slight overhead reduction when applied to real-world instances in OffsetStone, which agrees with similar existing experiments. We analyze these results and show that the ETBF defaults to TBF.