Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Optimizing stack frame accesses for processors with restricted addressing modes
Software—Practice & Experience
Storage assignment to decrease code size
ACM Transactions on Programming Languages and Systems (TOPLAS)
Algorithms for address assignment in DSP code generation
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Analysis and evaluation of address arithmetic capabilities in custom DSP architectures
DAC '97 Proceedings of the 34th annual Design Automation Conference
A uniform optimization technique for offset assignment problems
Proceedings of the 11th international symposium on System synthesis
Storage assignment optimizations to generate compact and efficient code on embedded DSPs
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
C Compiler Design for an Industrial Network Processor
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
Global array reference allocation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Array Reference Allocation Using SSA-Form and Live Range Growth
LCTES '00 Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
Optimal Live Range Merge for Address Register Allocation in Embedded Programs
CC '01 Proceedings of the 10th International Conference on Compiler Construction
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Optimizing Address Code Generation for Array-Intensive DSP Applications
Proceedings of the international symposium on Code generation and optimization
Reducing code size through address register assignment
ACM Transactions on Embedded Computing Systems (TECS)
Offset assignment using simultaneous variable coalescing
ACM Transactions on Embedded Computing Systems (TECS)
Offset assignment showdown: evaluation of DSP address code optimization algorithms
CC'03 Proceedings of the 12th international conference on Compiler construction
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Recent work on compilation for DSP-processors deals with optimizing access to local variables of functions. The common way is to use one or more address registers as pointers into the functions stack frame and modify it with post modify addressing modes (which are sometimes the only addressing modes). Additionally to previous work we present an algorithm which assigns frame pointer values over a whole procedure. Our algorithm also deals with basic blocks, which have no accesses to local variables. The algorithm works with a new data structure, the control flow line graph, which is derived from the control flow graph. In our experiments, the algorithm showed improvements to similar algorithms.