Storage assignment to decrease code size
ACM Transactions on Programming Languages and Systems (TOPLAS)
Software pipelining showdown: optimal vs. heuristic methods in a production compiler
PLDI '96 Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation
Algorithms for address assignment in DSP code generation
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Optimal and near-optimal global register allocations using 0–1 integer programming
Software—Practice & Experience
Precise register allocation for irregular architectures
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Storage assignment optimizations to generate compact and efficient code on embedded DSPs
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Simultaneous reference allocation in code generation for dual data memory bank ASIPs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Optimal spilling for CISC machines with few registers
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Static checking of interrupt-driven software
ICSE '01 Proceedings of the 23rd International Conference on Software Engineering
Register Allocation for Banked Register File
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
Storage allocation for embedded processors
CASES '01 Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
Heterogeneous memory management for embedded systems
CASES '01 Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
Compiling with code-size constraints
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
An Integer Linear Programming Model of Software Pipelining for the MIPS R8000 Processor
PaCT '97 Proceedings of the 4th International Conference on Parallel Computing Technologies
Evaluation of Algorithms for Local Register Allocation
CC '99 Proceedings of the 8th International Conference on Compiler Construction, Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS'99
Combining Register Allocation and Instruction Scheduling
Combining Register Allocation and Instruction Scheduling
Optimization of memory system in real-time embedded systems
ICCOMP'07 Proceedings of the 11th WSEAS International Conference on Computers
Near-optimal instruction selection on dags
Proceedings of the 6th annual IEEE/ACM international symposium on Code generation and optimization
SARA: combining stack allocation and register allocation
CC'06 Proceedings of the 15th international conference on Compiler Construction
A framework for end-to-end verification and evaluation of register allocators
SAS'07 Proceedings of the 14th international conference on Static Analysis
DIME: time-aware dynamic binary instrumentation using rate-based resource allocation
Proceedings of the Eleventh ACM International Conference on Embedded Software
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Most compilers ignore the problems of limited code space in embedded systems. Designers of embedded software often have no better alternative than to manually reduce the size of the source code or even the compiled code. Besides being tedious and error prone, such optimization results in obfuscated code that is difficult to maintain and reuse. In this paper, we present a step towards code-size-aware compilation. We phrase register allocation and code generation as an integer linear programming problem where the upper bound on the code size can simply be expressed as an additional constraint. The resulting compiler, when applied to six commercial microcontroller programs, generates code nearly as compact as carefully crafted code.