Application-specific memory management for embedded systems using software-controlled caches
Proceedings of the 37th Annual Design Automation Conference
Memory binding for performance optimization of control-flow intensive behaviors
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Resolution of dynamic memory allocation and pointers for the behavioral synthesis form C
DATE '00 Proceedings of the conference on Design, automation and test in Europe
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Hierarchical memory mapping during synthesis in FPGA-based reconfigurable computers
Proceedings of the conference on Design, automation and test in Europe
Cache conscious data layout organization for embedded multimedia applications
Proceedings of the conference on Design, automation and test in Europe
Access pattern based local memory customization for low power embedded systems
Proceedings of the conference on Design, automation and test in Europe
Static memory allocation by pointer analysis and coloring
Proceedings of the conference on Design, automation and test in Europe
Array allocation taking into account SDRAM characteristics
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
New directions in compiler technology for embedded systems (embedded tutorial)
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Data and memory optimization techniques for embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
From architecture to layout: partitioned memory synthesis for embedded systems-on-chip
Proceedings of the 38th annual Design Automation Conference
An optimal memory allocation for application-specific multiprocessor system-on-chip
Proceedings of the 14th international symposium on Systems synthesis
APEX: access pattern based memory architecture exploration
Proceedings of the 14th international symposium on Systems synthesis
Cache-efficient memory layout of aggregate data structures
Proceedings of the 14th international symposium on Systems synthesis
Source code transformation based on software cost analysis
Proceedings of the 14th international symposium on Systems synthesis
Synthesis of hardware models in C with pointers and complex data structures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Layout-driven memory synthesis for embedded systems-on-chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design space optimization of embedded memory systems via data remapping
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Automatic generation of embedded memory wrapper for multiprocessor SoC
Proceedings of the 39th annual Design Automation Conference
Reducing energy consumption by dynamic copying of instructions onto onchip memory
Proceedings of the 15th international symposium on System Synthesis
MIST: an algorithm for memory miss traffic management
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Software-assisted cache replacement mechanisms for embedded systems
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Color permutation: an iterative algorithm for memory packing
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
ACM Transactions on Embedded Computing Systems (TECS)
Access pattern-based memory and connectivity architecture exploration
ACM Transactions on Embedded Computing Systems (TECS)
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Data Memory Organization and Optimizations in Application-Specific Systems
IEEE Design & Test
Global interconnect trade-off for technology over memory modules to application level: case study
Proceedings of the 2003 international workshop on System-level interconnect prediction
Memory Architectures for Embedded Systems-On-Chip
HiPC '02 Proceedings of the 9th International Conference on High Performance Computing
Global memory mapping for FPGA-based reconfigurable systems
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
A 64Mbit Mesochronous Hybrid Wave Pipelined Multibank DRAM Macro
IMS '00 Revised Papers from the Second International Workshop on Intelligent Memory Systems
Aggressive Memory-Aware Compilation
IMS '00 Revised Papers from the Second International Workshop on Intelligent Memory Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
High-level synthesis of distributed logic-memory architectures
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Xtream-Fit: an energy-delay efficient data memory subsystem for embedded media processing
Proceedings of the 40th annual Design Automation Conference
Optimal Code and Data Layout in Embedded Systems
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Loop Alignment for Memory Accesses Optimization
Proceedings of the 12th international symposium on System synthesis
Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient Multi-Processor SoC
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Cache-Aware Scratchpad Allocation Algorithm
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Dynamic techniques to reduce memory traffic in embedded systems
Proceedings of the 1st conference on Computing frontiers
Proceedings of the 1st conference on Computing frontiers
Cluster miss prediction for instruction caches in embedded networking applications
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Virtual memory window for application-specific reconfigurable coprocessors
Proceedings of the 41st annual Design Automation Conference
Synthesis of Heterogeneous Distributed Architectures for Memory-Intensive Applications
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Fast, predictable and low energy memory references through architecture-aware compilation
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
A novel memory size model for variable-mapping in system level design
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Exception handling in microprocessors using assertion libraries
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Dynamic overlay of scratchpad memory for energy minimization
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Compiler-assisted demand paging for embedded systems with flash memory
Proceedings of the 4th ACM international conference on Embedded software
Multiple process execution in cache related preemption delay analysis
Proceedings of the 4th ACM international conference on Embedded software
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Proceedings of the international symposium on Code generation and optimization
Tag Overflow Buffering: An Energy-Efficient Cache Architecture
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Compiler-optimized usage of partitioned memories
WMPI '04 Proceedings of the 3rd workshop on Memory performance issues: in conjunction with the 31st international symposium on computer architecture
Zero clustering: an approach to extend zero compression to instruction caches
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Scalable precision cache analysis for preemptive scheduling
LCTES '05 Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Enabling unrestricted automated synthesis of portable hardware accelerators for virtual machines
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Memory binding for performance optimization of control-flow intensive behavioral descriptions
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy aware memory architecture configuration
MEDEA '04 Proceedings of the 2004 workshop on MEmory performance: DEaling with Applications , systems and architecture
Analysis of scratch-pad and data-cache performance using statistical methods
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Data partitioning for maximal scratchpad usage
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
STV-Cache: a leakage energy-efficient architecture for data caches
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Reuse analysis of indirectly indexed arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A dynamic code placement technique for scratchpad memory using postpass optimization
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
The Journal of Supercomputing
A unified evaluation framework for coarse grained reconfigurable array architectures
Proceedings of the 4th international conference on Computing frontiers
Architectural leakage-aware management of partitioned scratchpad memories
Proceedings of the conference on Design, automation and test in Europe
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
Scalable precision cache analysis for real-time software
ACM Transactions on Embedded Computing Systems (TECS) - Special Section LCTES'05
Reducing off-chip memory access costs using data recomputation in embedded chip multi-processors
Proceedings of the 44th annual Design Automation Conference
A table-based method for single-pass cache optimization
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Orchestrating data transfer for the cell/B.E. processor
Proceedings of the 22nd annual international conference on Supercomputing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Access pattern-based code compression for memory-constrained systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Address Generation Optimization for Embedded High-Performance Processors: A Survey
Journal of Signal Processing Systems
Embedded DSP Processor Design: Application Specific Instruction Set Processors
Embedded DSP Processor Design: Application Specific Instruction Set Processors
A Framework for Task Scheduling and Memory Partitioning for Multi-Processor System-on-Chip
HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
Resource aware mapping on coarse grained reconfigurable arrays
Microprocessors & Microsystems
Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays
The Journal of Supercomputing
SARA: StreAm register allocation
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Spatial locality exploitation for runtime reordering of JPEG2000 wavelet data layouts
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Software metadata: Systematic characterization of the memory behaviour of dynamic applications
Journal of Systems and Software
Partitioning and allocation of scratch-pad memory for priority-based preemptive multi-task systems
Proceedings of the Conference on Design, Automation and Test in Europe
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Overlay techniques for scratchpad memories in low power embedded processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
SSIP'05 Proceedings of the 5th WSEAS international conference on Signal, speech and image processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations
ACM Transactions on Embedded Computing Systems (TECS)
On-chip memory architecture exploration framework for DSP processor-based embedded system on chip
ACM Transactions on Embedded Computing Systems (TECS)
Efficient scratchpad allocation algorithms for energy constrained embedded systems
PACS'03 Proceedings of the Third international conference on Power - Aware Computer Systems
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From the Publisher:Memory Issues in Embedded Systems-on-Chip: Optimizations and Exploration covers techniques for optimization of system-level memory requirements, and exploration of candidate memory architectures for implementing processor-core-based embedded systems. It is designed for researchers and graduate students; for designers of embedded systems who are migrating from a traditional micro-controller centered, board-based design methodology to newer design methodologies using IP blocks for process of core-based embedded systems-on-chip; and for CAD tool developers who wish to expand their application base from a hardware synthesis target to embedded systems that combine significant amounts of software and hardware.