Application-specific memory management for embedded systems using software-controlled caches

  • Authors:

  • Derek Chiou;Prabhat Jain;Larry Rudolph;Srinivas Devadas

  • Affiliations:

  • Department of EECS, Massachusetts Institute of Technology, Cambridge, MA;Department of EECS, Massachusetts Institute of Technology, Cambridge, MA;Department of EECS, Massachusetts Institute of Technology, Cambridge, MA;Department of EECS, Massachusetts Institute of Technology, Cambridge, MA

  • Venue:
  • Proceedings of the 37th Annual Design Automation Conference
  • Year:
  • 2000

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Abstract

We propose a way to improve the performance of embedded processors running data-intensive applications by allowing software to allocate on-chip memory on an application-specific basis. On-chip memory in the form of cache can be made to act like scratch-pad memory via a novel hardware mechanism, which we call column caching. Column caching enables dynamic cache partitioning in software, by mapping data regions to a specified sets of cache “columns” or “ways.” When a region of memory is exclusively mapped to an equivalent sized partition of cache, column caching provides the same functionality and predictability as a dedicated scratchpad memory for time-critical parts of a real-time application. The ratio between scratchpad size and cache size can be easily and quickly varied for each application, or each task within an application. Thus, software has much finer software control of on-chip memory, providing the ability to dynamically tradeoff performance for on-chip memory.