A methodology for power efficient partitioning of data-dominated algorithm specifications within performance constraints

• Authors:

• K. Masselos;K. Danckaert;F. Catthoor;C. E. Goutis;H. DeMan

• Affiliations:

• VLSI Design Laboratory, Department of Electrical and Computer Engineering, University of Patras, Rio 26500, Greece and IMEC, Kapeldreef 75, B 3001 Leuven, Belgium;IMEC, Kapeldreef 75, B 3001 Leuven, Belgium;IMEC, Kapeldreef 75, B 3001 Leuven, Belgium and Kath.Univ.Leuven, Belgium;VLSI Design Laboratory, Department of Electrical and Computer Engineering, University of Patras, Rio 26500, Greece;IMEC, Kapeldreef 75, B 3001 Leuven, Belgium and Kath.Univ.Leuven, Belgium

• Venue:
• ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
• Year:
• 1999