REAL: a program for REgister ALlocation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Simultaneous scheduling and allocation for cost constrained optimal architectural synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Specification and design of embedded systems
Specification and design of embedded systems
Comprehensive lower bound estimation from behavioral descriptions
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Memory estimation for high level synthesis
DAC '94 Proceedings of the 31st annual Design Automation Conference
Background memory area estimation for multidimensional signal processing systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Memory size estimation for multimedia applications
Proceedings of the 6th international workshop on Hardware/software codesign
Exact memory size estimation for array computations without loop unrolling
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
A preprocessing step for global loop transformations for data transfer optimization
CASES '00 Proceedings of the 2000 international conference on Compilers, architecture, and synthesis for embedded systems
Optimizing memory usage in the polyhedral model
ACM Transactions on Programming Languages and Systems (TOPLAS)
Reducing memory requirements of nested loops for embedded systems
Proceedings of the 38th annual Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
Dependence Analysis for Supercomputing
Dependence Analysis for Supercomputing
Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design
High Performance Compilers for Parallel Computing
High Performance Compilers for Parallel Computing
Automated data dependency size estimation with a partially fixed execution ordering
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
On Uniformization of Affine Dependence Algorithms
IEEE Transactions on Computers
An Exact Method for Analysis of Value-based Array Data Dependences
Proceedings of the 6th International Workshop on Languages and Compilers for Parallel Computing
Optimizing Storage Size for Static Control Programs in Automatic Parallelizers
Euro-Par '97 Proceedings of the Third International Euro-Par Conference on Parallel Processing
Array Placement for Storage Size Reduction in Embedded Multimedia Systems
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
IEEE Transactions on Multimedia
Local memory exploration and optimization in embedded systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Application-driven synthesis of memory-intensive systems-on-chip
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The MPEG-4 video standard verification model
IEEE Transactions on Circuits and Systems for Video Technology
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Journal of Systems and Software
A compiler approach to managing storage and memory bandwidth in configurable architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Journal of Signal Processing Systems
Guidance of Loop Ordering for Reduced Memory Usage in Signal Processing Applications
Journal of Signal Processing Systems
Decision on the memory size of embedded information systems in an ubiquitous maintenance environment
Computers and Industrial Engineering
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A scalable and near-optimal representation of access schemes for memory management
ACM Transactions on Architecture and Code Optimization (TACO)
| Hi-index | 0.00 |
A novel storage requirement estimation methodology is presented for use in the early system design phases when the data transfer ordering is only partially fixed. At that stage, none of the existing estimation tools are adequate, as they either assume a fully specified execution order or ignore it completely. A prototype CAD tool has been developed that includes major parts of the storage requirement estimation and optimization methodology. Using representative application demonstrators, we show how our techniques and tool can effectively guide the designer to achieve a transformed specification with low storage requirement.