REAL: a program for REgister ALlocation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
In-place memory management of algebraic algorithms on application specific ICs
Journal of VLSI Signal Processing Systems - Special issue: algorithms and parallel VSLI architecture
PHIDEO: high-level synthesis for high throughput applications
Journal of VLSI Signal Processing Systems - Special issue on design environments for DSP
Synthesis of application-specific memory designs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Fast and extensive system-level memory exploration for ATM applications
ISSS '97 Proceedings of the 10th international symposium on System synthesis
DAC '98 Proceedings of the 35th annual Design Automation Conference
Global multimedia system design exploration using accurate memory organization feedback
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design
SystemC
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Memory bandwidth and pow er consumption are important design bottlenecks for data dominated applications. We propose a systematic system level exploration approach and formalised techniques to alleviate these bottlenec ks based on rearranging the format of the data records that are later stored in memory. The technique exploits parallelism in the data transfer and reduction in bit waste. Using our approach on sev eral real-life ATM processing applications, significant reduction in size, bandwidth and hence pow er consumption are obtained.