Theory of linear and integer programming
Theory of linear and integer programming
Faster scaling algorithms for general graph matching problems
Journal of the ACM (JACM)
In-place memory management of algebraic algorithms on application specific ICs
Journal of VLSI Signal Processing Systems - Special issue: algorithms and parallel VSLI architecture
Parallel Computing - Special issue on applications: parallel processing and multimedia
Automatic storage management for parallel programs
Parallel Computing - Special issues on languages and compilers for parallel computers
Optimizing memory usage in the polyhedral model
ACM Transactions on Programming Languages and Systems (TOPLAS)
Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design
Storage Size Reduction by In-place Mapping of Arrays
VMCAI '02 Revised Papers from the Third International Workshop on Verification, Model Checking, and Abstract Interpretation
Implementation of algorithms for maximum matching on nonbipartite graphs.
Implementation of algorithms for maximum matching on nonbipartite graphs.
Lattice-Based Memory Allocation
IEEE Transactions on Computers
Signal-to-Memory Mapping Analysis for Multimedia Signal Processing
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Computation of storage requirements for multi-dimensional signal processing applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Data dependency size estimation for use in memory optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The storage requirements in data-intensive signal processing systems (including applications in video and image processing, artificial vision, medical imaging, real-time 3-D rendering, advanced audio and speech coding) have an important impact on both the system performance and the essential design parameters -- the overall power consumption and chip area. This is due to the significant amount of data that must be stored during the execution of the algorithmic specification, as well as due to the amount of data transfers to/from large, energy-consuming, off-chip data memories. This paper addresses the problem of efficiently mapping the multidimensional signals from the algorithmic specification of the system into the physical memory. Different from all the previous mapping models that aim to optimize the memory sharing between the elements of a same array, creating separate windows in the physical memory for distinct arrays, this proposed mapping model is the first one to exploit the possibility of memory sharing between different arrays. As a consequence, this signal-to-memory mapping approach yields significant savings in the amount of data storage resulted after mapping.