Transforming set data types to power optimal data structures
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
DAC '98 Proceedings of the 35th annual Design Automation Conference
The art of computer programming, volume 3: (2nd ed.) sorting and searching
The art of computer programming, volume 3: (2nd ed.) sorting and searching
Automated data-member layout of heap objects to improve memory-hierarchy performance
ACM Transactions on Programming Languages and Systems (TOPLAS)
Dynamic Access Ordering for Streamed Computations
IEEE Transactions on Computers
Continuous Program Optimization: Design and Evaluation
IEEE Transactions on Computers
Dynamic Power Management: Design Techniques and CAD Tools
Dynamic Power Management: Design Techniques and CAD Tools
Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design
Low power system scheduling and synthesis
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A Method for Automatic Optimization of Dynamic Memory Management in C++
ICPP '02 Proceedings of the 2001 International Conference on Parallel Processing
Dynamic Storage Allocation: A Survey and Critical Review
IWMM '95 Proceedings of the International Workshop on Memory Management
Exploration and Synthesis of Dynamic Data Sets in Telecom Network Applications
Proceedings of the 12th international symposium on System synthesis
Memory management for embedded network applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Journal of VLSI Signal Processing Systems
System-scenario-based design of dynamic embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Memory-access-aware data structure transformations for embedded software with dynamic data accesses
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2002 international symposium on low-power electronics and design (ISLPED)
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In the past decades, data structure analysis was mainly done at a high level of abstraction in the computer science community. For instance, choosing a linked list as a data structure as opposed to an array for a specific situation, was mainly motivated from a performance point of view under the implicit assumption that the computer platform (that had to run the software) consisted out of one monolithical, physical memory. In the context of mobile, embedded devices, energy consumption is as important as performance. In addition to this, the assumption of one monolithical memory is outdated for many (if not all) current-day platforms! Clearly, there is a need to improve the choices that are made during data structure analysis given specific knowledge of the memory hierarchy of the platform under investigation. We show how memory related energy consumption can heavily be reduced by taking into account the access behaviour of the application on the one hand and the available on-chip and off-chip memory space on the other hand. We do this by exploiting the sparseness that is present in onesteady state of the data structure under investigation. Analytical results show that energy reductions of a factor of 8.7 are feasible in comparison to common data structure implementations. We trade these gains off with on-chip memory space consumption of a custom memory architecture.