Shade: a fast instruction-set simulator for execution profiling
SIGMETRICS '94 Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Region-based compilation: an introduction and motivation
Proceedings of the 28th annual international symposium on Microarchitecture
DIGITAL FX!32: combining emulation and binary translation
Digital Technical Journal
Efficient implementation of the smalltalk-80 system
POPL '84 Proceedings of the 11th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
DIGITAL FX!32 running 32-bit ×86 applications on alpha NT
NT'97 Proceedings of the USENIX Windows NT Workshop on The USENIX Windows NT Workshop 1997
Spike: an optimizer for alpha/NT executables
NT'97 Proceedings of the USENIX Windows NT Workshop on The USENIX Windows NT Workshop 1997
Optimizations and oracle parallelism with dynamic translation
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Binary translation and architecture convergence issues for IBM system/390
Proceedings of the 14th international conference on Supercomputing
Proceedings of the 27th annual international symposium on Computer architecture
Dynamo: a transparent dynamic optimization system
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
A new approach to assembly software retargeting for microcontrollers
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Facile: a language and compiler for high-performance processor simulators
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
An ultra-fast instruction set simulator
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Execution-Based Scheduling for VLIW Architectures
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Dynamic binary translation for accumulator-oriented architectures
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Retargetable and reconfigurable software dynamic translation
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
An infrastructure for adaptive dynamic optimization
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Dynamic native optimization of interpreters
Proceedings of the 2003 workshop on Interpreters, virtual machines and emulators
LLVA: A Low-level Virtual Instruction Set Architecture
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Exploring Code Cache Eviction Granularities in Dynamic Optimization Systems
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Module-aware translation for real-life desktop applications
Proceedings of the 1st ACM/USENIX international conference on Virtual execution environments
DynamoSim: a trace-based dynamically compiled instruction set simulator
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Thread-Shared Software Code Caches
Proceedings of the International Symposium on Code Generation and Optimization
Optimizing Dynamic Binary Translation for SIMD Instructions
Proceedings of the International Symposium on Code Generation and Optimization
Evaluating fragment construction policies for SDT systems
Proceedings of the 2nd international conference on Virtual execution environments
Reducing Startup Time in Co-Designed Virtual Machines
Proceedings of the 33rd annual international symposium on Computer Architecture
Compile-time planning for overhead reduction in software dynamic translators
International Journal of Parallel Programming - Special issue: The next generation software program
VXA: a virtual architecture for durable compressed archives
FAST'05 Proceedings of the 4th conference on USENIX Conference on File and Storage Technologies - Volume 4
Metadata driven memory optimizations in dynamic binary translator
Proceedings of the 3rd international conference on Virtual execution environments
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Process-shared and persistent code caches
Proceedings of the fourth ACM SIGPLAN/SIGOPS international conference on Virtual execution environments
Non-intrusive dynamic application profiler for detailed loop execution characterization
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Mostly static program partitioning of binary executables
ACM Transactions on Programming Languages and Systems (TOPLAS)
An Evaluation of Misaligned Data Access Handling Mechanisms in Dynamic Binary Translation Systems
Proceedings of the 7th annual IEEE/ACM International Symposium on Code Generation and Optimization
MTCrossBit: A Dynamic Binary Translation System Using Multithreaded Optimization Framework
ICA3PP '09 Proceedings of the 9th International Conference on Algorithms and Architectures for Parallel Processing
Efficient binary translation system with low hardware cost
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Generating low-overhead dynamic binary translators
Proceedings of the 3rd Annual Haifa Experimental Systems Conference
Binary translation using peephole superoptimizers
OSDI'08 Proceedings of the 8th USENIX conference on Operating systems design and implementation
CoDBT: A multi-source dynamic binary translator using hardware-software collaborative techniques
Journal of Systems Architecture: the EUROMICRO Journal
DisIRer: Converting a retargetable compiler into a multiplatform binary translator
ACM Transactions on Architecture and Code Optimization (TACO)
Efficient hardware-based nonintrusive dynamic application profiling
ACM Transactions on Embedded Computing Systems (TECS)
Efficient and effective misaligned data access handling in a dynamic binary translation system
ACM Transactions on Architecture and Code Optimization (TACO)
Evaluating indirect branch handling mechanisms in software dynamic translation systems
ACM Transactions on Architecture and Code Optimization (TACO)
Towards an adaptable multiple-ISA reconfigurable processor
ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications
Dynamo: a transparent dynamic optimization system
ACM SIGPLAN Notices
Generalized just-in-time trace compilation using a parallel task farm in a dynamic binary translator
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Proceedings of the 8th ACM International Conference on Computing Frontiers
Dynamic register promotion of stack variables
CGO '11 Proceedings of the 9th Annual IEEE/ACM International Symposium on Code Generation and Optimization
Runtime automatic speculative parallelization
CGO '11 Proceedings of the 9th Annual IEEE/ACM International Symposium on Code Generation and Optimization
HQEMU: a multi-threaded and retargetable dynamic binary translator on multicores
Proceedings of the Tenth International Symposium on Code Generation and Optimization
Background optimization in full system binary translation
Programming and Computing Software
SINOF: A dynamic-static combined framework for dynamic binary translation
Journal of Systems Architecture: the EUROMICRO Journal
LLBT: an LLVM-based static binary translator
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
Towards a multiple-ISA embedded system
Journal of Systems Architecture: the EUROMICRO Journal
A compiler-level intermediate representation based binary analysis and rewriting system
Proceedings of the 8th ACM European Conference on Computer Systems
Boosting instruction set simulator performance with parallel block optimisation and replacement
ACSC '12 Proceedings of the Thirty-fifth Australasian Computer Science Conference - Volume 122
Cider: native execution of iOS apps on android
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
Effective code discovery for ARM/Thumb mixed ISA binaries in a static binary translator
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
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Because the DIGITAL Alpha architecture provides the world's fastest processors, many applications, especially those that require very high performance, have been ported to that architecture. However, many other applications are available only under the x86 architecture. DIGITAL FX!32ý was designed to make the complete set of applications, both native and x86, available to Alpha. The goal for DIGITAL FX!32 is to provide fast and transparent execution of x86 Win32 applications on Windows NT Alpha. DIGITAL FX!32 achieves its goal by transparently running those applications at speeds that are comparable to high-performance x86 platforms. Before the introduction of DIGITAL FX!32, there were two technologies for running an application on a different architecture than the one for which it was originally compiled: emulation and binary translation. Each technology has an advantage, but also a drawback. Emulation is transparent and robust, but delivers only modest performance. Binary translation[11] is fast, but not transparent. For the first time, DIGITAL FX!32 combines these technologies to provide both fast and transparent execution. DIGITAL FX!32 consists of three interoperating components. There is a run-time environment that provides the transparent execution, a binary translator (the background optimizer) that provides the high performance, and a server that coordinates them. Although DIGITAL FX!32 is transparent and does not require user intervention, it includes a graphical interface for monitoring status and managing system resources. The first time an x86 application is run, all of the application is emulated. Together with transparently running the application, the emulator generates an execution profile that describes the application's execution history. The profile shows which parts of the application are heavily used (for this user) and which parts are unimportant or rarely used. While the first run may be slow, it "primes the pump" for additional processing. Later, after the application exits, the profile data directs the background optimizer to generate native Alpha code as replacement for all the frequently executed procedures. When the application is next run, the native Alpha code is used and the application executes much faster. This process is repeated whenever a sufficiently enlarged profile shows that it is warranted. This article provides an overview of DIGITAL FX!32 and describes in depth the three most significant innovations: Transparent operation, Interface to the native APIs, Profile-driven binary translation.