Efficient and effective misaligned data access handling in a dynamic binary translation system

  • Authors:

  • Jianjun Li;Chenggang Wu;Wei-Chung Hsu

  • Affiliations:

  • Institute of Computing Technology Graduate University of Chinese Academy of Sciences, Beijing, China;Institute of Computing Technology, Beijing, China;National Chiao Tung University, Hsinchu, Taiwan

  • Venue:
  • ACM Transactions on Architecture and Code Optimization (TACO)
  • Year:
  • 2011

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Abstract

Binary Translation (BT) has been commonly used to migrate application software across Instruction Set Architectures (ISAs). Some architectures, such as X86, allow Misaligned Data Accesses (MDAs), while most modern architectures require natural data alignments. In a binary translation system, where the source ISA allows MDA and the target ISA does not, memory operations must be carefully translated. Naive translation may cause frequent misaligned data access traps to occur at runtime on the target machine and severely slow down the migrated application. This article evaluates different approaches in handling MDA in a binary translation system including how to identify MDA candidates and how to translate such memory instructions. This article also proposes some new mechanisms to more effectively deal with MDAs. Extensive measurements based on SPEC CPU2000 and CPU2006 benchmarks show that the proposed approaches are more effective than existing methods and getting close to the performance upper bound of MDA handling.