Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Mimic: a fast system/370 simulator
SIGPLAN '87 Papers of the Symposium on Interpreters and interpretive techniques
“Combining” as a compilation technique for VLIW architectures
MICRO 22 Proceedings of the 22nd annual workshop on Microprogramming and microarchitecture
Selected papers of the second workshop on Languages and compilers for parallel computing
Limits of instruction-level parallelism
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
Incremental tree height reduction for high level synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Limits of control flow on parallelism
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
On the limits of program parallelism and its smoothability
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
Context-sensitive interprocedural points-to analysis in the presence of function pointers
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Embra: fast and flexible machine simulation
Proceedings of the 1996 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Exceeding the dataflow limit via value prediction
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
DAISY: dynamic compilation for 100% architectural compatibility
Proceedings of the 24th annual international symposium on Computer architecture
Streamlining inter-operation memory communication via data dependence prediction
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
The Parallel Evaluation of General Arithmetic Expressions
Journal of the ACM (JACM)
FX!32: A Profile-Directed Binary Translator
IEEE Micro
Execution-Based Scheduling for VLIW Architectures
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
MICRO 14 Proceedings of the 14th annual workshop on Microprogramming
Percolation Scheduling: A Parallel Compilation Technique
Percolation Scheduling: A Parallel Compilation Technique
Binary translation and architecture convergence issues for IBM system/390
Proceedings of the 14th international conference on Supercomputing
Understanding the backward slices of performance degrading instructions
Proceedings of the 27th annual international symposium on Computer architecture
Limits and Graph Structure of Available Instruction-Level Parallelism (Research Note)
Euro-Par '00 Proceedings from the 6th International Euro-Par Conference on Parallel Processing
Compile-time planning for overhead reduction in software dynamic translators
International Journal of Parallel Programming - Special issue: The next generation software program
Evaluation of bus based interconnect mechanisms in clustered VLIW architectures
International Journal of Parallel Programming
Trace execution automata in dynamic binary translation
ISCA'10 Proceedings of the 2010 international conference on Computer Architecture
Just-In-Time Software Pipelining
Proceedings of Annual IEEE/ACM International Symposium on Code Generation and Optimization
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We describe several optimizations which can be employed in a dynamic binary translation (DBT) system, where low compilation/translation overhead is essential. These optimizations achieve a high degree of ILP, sometimes even surpassing a static compiler employing more sophisticated, and more time-consuming algorithms [9]. We present results in which we employ these optimizations in a dynamic binary translation system capable of computing oracle parallelism.