“Combining” as a compilation technique for VLIW architectures

  • Authors:
  • T. Nakatani;K. Ebcioğlu

  • Affiliations:
  • IBM Tokyo Research Laboratory, 5-19 Sanbancho, Chiyoda-ku, Tokyo;IBM Thomas J. Watson Research Center, P.O.Box 218, Yorktown Heights, NY

  • Venue:
  • MICRO 22 Proceedings of the 22nd annual workshop on Microprogramming and microarchitecture
  • Year:
  • 1989

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Abstract

Combining is a local compiler optimization technique that can enhance the performance of global compaction techniques for VLIW machines. Given two adjacent operations of a certain class that are flow (read-after-write) dependent and that cannot be placed in the same micro-instruction, the combining technique can transform the operations so that the modified operations have no dependence. The transformed operations can be executed in the same micro-instruction, thus allowing the total execution time of the program to be reduced. In this paper, combining a pair of flow-dependent operations into a wide instruction word is suggested as an important compilation technique for VLIW architectures. Combining is particularly effective with software pipelining and loop unrolling since combinable operations can come together with a higher probability when these compilation techniques are used. We implemented combining in our parallelizing compiler for the wide instruction word architecture, which is now being built at the IBM T. J. Watson Research Center. It is shown that ten percent speedup is obtained on the Stanford integer benchmarks and other sequential-matured C programs, in comparison to compaction techniques that do not use combining. For a class of inner loops, combining can remove the inter-iteration dependencies completely and can improve performance in the same ratio as the loop is unrolled.