Shade: a fast instruction-set simulator for execution profiling
SIGMETRICS '94 Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems
IEEE Micro
The TigerSHARC DSP Architecture
IEEE Micro
ATOM: a system for building customized program analysis tools
ACM SIGPLAN Notices - Best of PLDI 1979-1999
Pin: building customized program analysis tools with dynamic instrumentation
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
A Low-Power Multithreaded Processor for Software Defined Radio
Journal of VLSI Signal Processing Systems
A dynamic binary instrumentation engine for the ARM architecture
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
QEMU, a fast and portable dynamic translator
ATEC '05 Proceedings of the annual conference on USENIX Annual Technical Conference
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
A software-defined communications baseband design
IEEE Communications Magazine
International Journal of High Performance Systems Architecture
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In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run cooperatively with a multi-core DSP simulator on x86 hosts. The integrated simulator can boot ARM/Linux alongside another operating system running on DSP cores, thus truly supporting a heterogeneous multi-core operating environment. In addition, the simulator facilitates exploration of several system design parameters such as memory latencies, cache organization etc. via lightweight user-defined instrumentation. We provide performance results and highlight the impact of design choices on our overall performance and design objectives. We also discuss implementation techniques and trade-offs between the competing requirements of simulation speed versus accuracy in a complex multi-core simulation environment.