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Proceedings of the 1996 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
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Proceedings of the conference on Design, automation and test in Europe
A universal technique for fast and flexible instruction-set architecture simulation
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Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs
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Trace-driven HW/SW cosimulation using virtual synchronization technique
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ATEC '05 Proceedings of the annual conference on USENIX Annual Technical Conference
An effective synchronization approach for fast and accurate multi-core instruction-set simulation
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Exploiting Simulation Slack to Improve Parallel Simulation Speed
ICPP '09 Proceedings of the 2009 International Conference on Parallel Processing
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the Conference on Design, Automation and Test in Europe
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Ideally, multi-core instruction-set simulation should run in parallel to improve simulation performance. However, the conventional low-parallelism centralized scheduler greatly constrains simulation performance. To resolve this issue, we propose a high-parallelism distributed scheduling mechanism. The experimental results show that our proposed approach accelerates simulation by 6 to 20 times, depending on the number of cores.