A high-parallelism distributed scheduling mechanism for multi-core instruction-set simulation

  • Authors:
  • Meng-Huan Wu;Peng-Chih Wang;Cheng-Yang Fu;Ren-Song Tsay

  • Affiliations:
  • National Tsing Hua University, HsinChu, Taiwan;National Tsing Hua University, HsinChu, Taiwan;National Tsing Hua University, HsinChu, Taiwan;National Tsing Hua University, HsinChu, Taiwan

  • Venue:
  • Proceedings of the 48th Design Automation Conference
  • Year:
  • 2011

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Abstract

Ideally, multi-core instruction-set simulation should run in parallel to improve simulation performance. However, the conventional low-parallelism centralized scheduler greatly constrains simulation performance. To resolve this issue, we propose a high-parallelism distributed scheduling mechanism. The experimental results show that our proposed approach accelerates simulation by 6 to 20 times, depending on the number of cores.